URL https://opencores.org/ocsvn/usb_dongle_fpga/usb_dongle_fpga/trunk

Subversion Repositories usb_dongle_fpga

[/] [usb_dongle_fpga/] [tags/] [version_1_5/] [src/] [lpc_proto/] [lpc_byte.vhd] - Diff between revs 20 and 35

Rev 20	Rev 35
Line 207...	Line 207...
`end case;`	`end case;`
`when DATAs => -----------------------------------------------------------`	`when DATAs => -----------------------------------------------------------`
`case cycle_type is`	`case cycle_type is`
`when LPC_IO_W => --IO write cycle`	`when LPC_IO_W => --IO write cycle`
`if r_cnt ="001" then`	`if r_cnt ="001" then`
`r_data <= r_data(3 downto 0)&lad_i;`	`r_data <= lad_i&r_data(7 downto 4); --LSB first from io cycle`
`r_cnt <= "000";`	`r_cnt <= "000";`
`lpc_wr <='1'; --IO write must accure`	`lpc_wr <='1'; --IO write must accure`
`lpc_val <='1';`	`lpc_val <='1';`
`CS <= TARs;`	`CS <= TARs;`
`else`	`else`
`r_data <= r_data(3 downto 0)&lad_i;`	`r_data <= lad_i&r_data(7 downto 4); --LSB first from io cycle`
`r_cnt<=r_cnt + 1;`	`r_cnt<=r_cnt + 1;`
`CS <= DATAs;`	`CS <= DATAs;`
`end if;`	`end if;`
`when LPC_MEM_R \| LPC_FW_R => --Memory/FW read cycle`	`when LPC_MEM_R \| LPC_FW_R => --Memory/FW read cycle`
`if r_cnt ="001" then`	`if r_cnt ="001" then`