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/*!
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/*!
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flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB-FPGA Module 1.15
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Default firmware and loader for ZTEX USB-FPGA Modules 2.13
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Copyright (C) 2009-2011 ZTEX GmbH.
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Copyright (C) 2009-2014 ZTEX GmbH.
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http://www.ztex.de
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http://www.ztex.de
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License version 3 as
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it under the terms of the GNU General Public License version 3 as
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published by the Free Software Foundation.
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published by the Free Software Foundation.
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// config.setUserData(33, (byte) (config.getUserData(33)+1) );
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// config.setUserData(33, (byte) (config.getUserData(33)+1) );
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if ( variant == 1 ) {
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if ( variant == 1 ) {
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config.setName("ZTEX USB-FPGA Module", 2, 13, "a");
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config.setName("ZTEX USB-FPGA Module", 2, 13, "a");
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config.setFpga("XC7A35T", "CSG324", "1C");
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config.setFpga("XC7A35T", "CSG324", "1C");
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config.setRam(256,"DDR2-800 SDRAM");
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config.setRam(256,"DDR3-800 SDRAM");
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config.setMaxBitstreamSize(610);
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config.setMaxBitstreamSize(610);
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} else if ( variant == 2 ) {
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} else if ( variant == 2 ) {
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config.setName("ZTEX USB-FPGA Module", 2, 13, "b");
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config.setName("ZTEX USB-FPGA Module", 2, 13, "b");
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config.setFpga("XC7A50T", "CSG324", "1C");
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config.setFpga("XC7A50T", "CSG324", "1C");
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config.setRam(256,"DDR2-800 SDRAM");
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config.setRam(256,"DDR3-800 SDRAM");
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config.setMaxBitstreamSize(640);
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config.setMaxBitstreamSize(640);
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} else if ( variant == 3 ) {
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} else if ( variant == 3 ) {
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config.setName("ZTEX USB-FPGA Module", 2, 13, "c");
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config.setName("ZTEX USB-FPGA Module", 2, 13, "c");
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config.setFpga("XC7A75T", "CSG324", "2C");
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config.setFpga("XC7A75T", "CSG324", "2C");
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config.setRam(256,"DDR2-800 SDRAM");
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config.setRam(256,"DDR3-800 SDRAM");
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config.setMaxBitstreamSize(1130);
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config.setMaxBitstreamSize(1130);
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} else {
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} else {
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config.setName("ZTEX USB-FPGA Module", 2, 13, "d");
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config.setName("ZTEX USB-FPGA Module", 2, 13, "d");
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config.setFpga("XC7A100T", "CSG324", "2C");
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config.setFpga("XC7A100T", "CSG324", "2C");
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config.setRam(256,"DDR2-800 SDRAM");
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config.setRam(256,"DDR3-800 SDRAM");
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config.setMaxBitstreamSize(1130);
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config.setMaxBitstreamSize(1130);
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}
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}
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System.out.println("Writing configuration data.");
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System.out.println("Writing configuration data.");
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ztex.config=null;
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ztex.config=null;
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