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/*!
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/*!
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ZTEX Firmware Kit for EZ-USB Microcontrollers
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ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
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Copyright (C) 2009-2010 ZTEX e.K.
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Copyright (C) 2009-2011 ZTEX GmbH.
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http://www.ztex.de
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http://www.ztex.de
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License version 3 as
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it under the terms of the GNU General Public License version 3 as
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published by the Free Software Foundation.
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published by the Free Software Foundation.
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#ifndef[ZTEX_FPGA_H]
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#ifndef[ZTEX_FPGA_H]
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#define[ZTEX_FPGA_H]
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#define[ZTEX_FPGA_H]
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#define[@CAPABILITY_FPGA;]
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#define[@CAPABILITY_FPGA;]
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xdata BYTE fpga_checksum; // checksum
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__xdata BYTE fpga_checksum; // checksum
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xdata DWORD fpga_bytes; // transfered bytes
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__xdata DWORD fpga_bytes; // transfered bytes
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xdata BYTE fpga_init_b; // init_b state (should be 222 after configuration)
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__xdata BYTE fpga_init_b; // init_b state (should be 222 after configuration)
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xdata BYTE fpga_flash_result; // result of automatic fpga configuarion from Flash
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__xdata BYTE fpga_flash_result; // result of automatic fpga configuarion from Flash
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/* *********************************************************************
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/* *********************************************************************
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***** reset_fpga ****************************************************
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***** reset_fpga ****************************************************
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********************************************************************* */
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********************************************************************* */
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static void reset_fpga_int (BYTE mode) { // reset FPGA
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static void reset_fpga_int (BYTE mode) { // reset FPGA
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void fpga_send_ep0() {
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void fpga_send_ep0() {
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BYTE oOED;
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BYTE oOED;
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oOED = OED;
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oOED = OED;
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OED = 255;
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OED = 255;
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fpga_bytes += ep0_payload_transfer;
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fpga_bytes += ep0_payload_transfer;
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_asm
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__asm
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mov dptr,#_EP0BCL
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mov dptr,#_EP0BCL
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movx a,@dptr
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movx a,@dptr
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jz 010000$
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jz 010000$
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mov r2,a
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mov r2,a
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mov _AUTOPTRL1,#(_EP0BUF)
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mov _AUTOPTRL1,#(_EP0BUF)
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mov dptr,#_fpga_checksum
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mov dptr,#_fpga_checksum
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mov a,r1
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mov a,r1
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movx @dptr,a
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movx @dptr,a
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010000$:
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010000$:
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_endasm;
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__endasm;
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OED = oOED;
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OED = oOED;
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if ( EP0BCL<64 ) {
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if ( EP0BCL<64 ) {
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finish_fpga_configuration();
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finish_fpga_configuration();
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}
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}
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}
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}
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/* *********************************************************************
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/* *********************************************************************
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***** fpga_send_bitstream_from_flash ********************************
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***** fpga_send_bitstream_from_flash ********************************
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********************************************************************* */
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********************************************************************* */
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void fpga_send_bitstream_from_flash (WORD size) {
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void fpga_send_bitstream_from_flash (WORD size) {
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size; // this avoids stupid warnings
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size; // this avoids stupid warnings
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_asm
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__asm
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push _OED
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push _OED
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mov _OED,#0
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mov _OED,#0
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mov r5,dpl // = size
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mov r5,dpl // = size
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mov r6,dph
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mov r6,dph
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dec r5
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dec r5
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cjne r5,#0xff,010003$
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cjne r5,#0xff,010003$
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dec r6
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dec r6
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sjmp 010003$
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sjmp 010003$
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_endasm;
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__endasm;
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}
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}
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#include[ztex-fpga-flash.h]
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#include[ztex-fpga-flash.h]
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#else
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#else
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