Line 40... |
Line 40... |
//// Public License along with this source; if not, download it ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// $Id: processRxBit.v,v 1.2 2004-12-18 14:36:15 sfielding Exp $
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// $Id: processRxBit.v,v 1.3 2004-12-31 14:40:43 sfielding Exp $
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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//
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//
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Line 148... |
Line 148... |
next_processRxBitRdy <= 1'b1;
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next_processRxBitRdy <= 1'b1;
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NextState_prRxBit <= `WAIT_BITS;
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NextState_prRxBit <= `WAIT_BITS;
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end
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end
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`WAIT_BITS:
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`WAIT_BITS:
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begin
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begin
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if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `DATA_RECEIVE_BIT_ST))
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if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `WAIT_RESUME_ST))
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begin
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begin
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NextState_prRxBit <= `DATA_RX_CHK_SE0;
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NextState_prRxBit <= `RES_RX_CHK;
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next_RxBits <= RxBitsIn;
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next_RxBits <= RxBitsIn;
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next_processRxBitRdy <= 1'b0;
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next_processRxBitRdy <= 1'b0;
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end
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end
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else if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `WAIT_RESUME_ST))
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else if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `DATA_RECEIVE_BIT_ST))
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begin
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begin
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NextState_prRxBit <= `RES_RX_CHK;
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NextState_prRxBit <= `DATA_RX_CHK_SE0;
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next_RxBits <= RxBitsIn;
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next_RxBits <= RxBitsIn;
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next_processRxBitRdy <= 1'b0;
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next_processRxBitRdy <= 1'b0;
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end
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end
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else if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `RESUME_END_WAIT_ST))
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else if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `IDLE_BIT_ST))
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begin
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begin
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NextState_prRxBit <= `RES_END_CHK1;
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NextState_prRxBit <= `IDLE_CHK_KBIT;
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next_RxBits <= RxBitsIn;
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next_RxBits <= RxBitsIn;
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next_processRxBitRdy <= 1'b0;
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next_processRxBitRdy <= 1'b0;
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end
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end
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else if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `IDLE_BIT_ST))
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else if ((processRxBitsWEn == 1'b1) && (RXBitStMachCurrState == `RESUME_END_WAIT_ST))
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begin
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begin
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NextState_prRxBit <= `IDLE_CHK_KBIT;
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NextState_prRxBit <= `RES_END_CHK1;
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next_RxBits <= RxBitsIn;
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next_RxBits <= RxBitsIn;
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next_processRxBitRdy <= 1'b0;
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next_processRxBitRdy <= 1'b0;
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end
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end
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end
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end
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`IDLE_FIRST_BIT:
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`IDLE_FIRST_BIT:
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