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[/] [usbhostslave/] [tags/] [rel_01_01/] [RTL/] [serialInterfaceEngine/] [siereceiver.v] - Diff between revs 9 and 18

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Rev 9 Rev 18
Line 91... Line 91...
  next_RXStMachCurrState <= RXStMachCurrState;
  next_RXStMachCurrState <= RXStMachCurrState;
  next_RxBits <= RxBits;
  next_RxBits <= RxBits;
  case (CurrState_rcvr)  // synopsys parallel_case full_case
  case (CurrState_rcvr)  // synopsys parallel_case full_case
    `WAIT_BIT:
    `WAIT_BIT:
    begin
    begin
      if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_LOW_SPEED_CONN_ST))
      if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_LOW_SP_DISCONNECT_ST))
      begin
      begin
        NextState_rcvr <= `WAIT_LS_CONN_CHK_RX_BITS;
        NextState_rcvr <= `WAIT_LS_DIS_CHK_RX_BITS;
        next_RxBits <= RxWireDataIn;
        next_RxBits <= RxWireDataIn;
      end
      end
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `CONNECT_LOW_SPEED_ST))
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `CONNECT_FULL_SPEED_ST))
      begin
      begin
        NextState_rcvr <= `LS_CONN_CHK_RX_BITS;
        NextState_rcvr <= `FS_CONN_CHK_RX_BITS1;
        next_RxBits <= RxWireDataIn;
        next_RxBits <= RxWireDataIn;
      end
      end
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `CONNECT_FULL_SPEED_ST))
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `CONNECT_LOW_SPEED_ST))
      begin
      begin
        NextState_rcvr <= `FS_CONN_CHK_RX_BITS1;
        NextState_rcvr <= `LS_CONN_CHK_RX_BITS;
        next_RxBits <= RxWireDataIn;
        next_RxBits <= RxWireDataIn;
      end
      end
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_LOW_SP_DISCONNECT_ST))
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_LOW_SPEED_CONN_ST))
      begin
      begin
        NextState_rcvr <= `WAIT_LS_DIS_CHK_RX_BITS;
        NextState_rcvr <= `WAIT_LS_CONN_CHK_RX_BITS;
        next_RxBits <= RxWireDataIn;
        next_RxBits <= RxWireDataIn;
      end
      end
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_FULL_SP_DISCONNECT_ST))
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_FULL_SPEED_CONN_ST))
      begin
      begin
        NextState_rcvr <= `WAIT_FS_DIS_CHK_RX_BITS2;
        NextState_rcvr <= `WAIT_FS_CONN_CHK_RX_BITS;
        next_RxBits <= RxWireDataIn;
        next_RxBits <= RxWireDataIn;
      end
      end
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `DISCONNECT_ST))
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `DISCONNECT_ST))
      begin
      begin
        NextState_rcvr <= `DISCNCT_CHK_RXBITS;
        NextState_rcvr <= `DISCNCT_CHK_RXBITS;
        next_RxBits <= RxWireDataIn;
        next_RxBits <= RxWireDataIn;
      end
      end
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_FULL_SPEED_CONN_ST))
      else if ((RxWireDataWEn == 1'b1) && (RXStMachCurrState == `WAIT_FULL_SP_DISCONNECT_ST))
      begin
      begin
        NextState_rcvr <= `WAIT_FS_CONN_CHK_RX_BITS;
        NextState_rcvr <= `WAIT_FS_DIS_CHK_RX_BITS2;
        next_RxBits <= RxWireDataIn;
        next_RxBits <= RxWireDataIn;
      end
      end
    end
    end
    `START_SRX:
    `START_SRX:
    begin
    begin

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