Line 243... |
Line 243... |
`TX_TRANS_TYPE_REG : dataOut <= {6'b000000, TxTransTypeReg};
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`TX_TRANS_TYPE_REG : dataOut <= {6'b000000, TxTransTypeReg};
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`TX_LINE_CONTROL_REG : dataOut <= {3'b000, TxLineControlReg};
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`TX_LINE_CONTROL_REG : dataOut <= {3'b000, TxLineControlReg};
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`TX_SOF_ENABLE_REG : dataOut <= {7'b0000000, TxSOFEnableReg};
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`TX_SOF_ENABLE_REG : dataOut <= {7'b0000000, TxSOFEnableReg};
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`TX_ADDR_REG : dataOut <= {1'b0, TxAddrReg};
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`TX_ADDR_REG : dataOut <= {1'b0, TxAddrReg};
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`TX_ENDP_REG : dataOut <= {4'h0, TxEndPReg};
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`TX_ENDP_REG : dataOut <= {4'h0, TxEndPReg};
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`FRAME_NUM_MSB_REG : dataOut <= frameNumIn[10:3];
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`FRAME_NUM_MSB_REG : dataOut <= {5'b00000, frameNumIn[10:8]};
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`FRAME_NUM_LSB_REG : dataOut <= {5'b00000, frameNumIn[2:0]};
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`FRAME_NUM_LSB_REG : dataOut <= frameNumIn[7:0];
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`INTERRUPT_STATUS_REG : dataOut <= {4'h0, SOFSentInt, connEventInt, resumeInt, transDoneInt};
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`INTERRUPT_STATUS_REG : dataOut <= {4'h0, SOFSentInt, connEventInt, resumeInt, transDoneInt};
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`INTERRUPT_MASK_REG : dataOut <= {4'h0, interruptMaskReg};
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`INTERRUPT_MASK_REG : dataOut <= {4'h0, interruptMaskReg};
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`RX_STATUS_REG : dataOut <= RxPktStatusIn;
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`RX_STATUS_REG : dataOut <= RxPktStatusIn;
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`RX_PID_REG : dataOut <= {4'b0000, RxPIDIn};
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`RX_PID_REG : dataOut <= {4'b0000, RxPIDIn};
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`RX_CONNECT_STATE_REG : dataOut <= {6'b000000, connectStateIn};
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`RX_CONNECT_STATE_REG : dataOut <= {6'b000000, connectStateIn};
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