| Line 3... |
Line 3... |
FILE="softransmit.asf"
|
FILE="softransmit.asf"
|
FID=405c2645
|
FID=405c2645
|
LANGUAGE=VERILOG
|
LANGUAGE=VERILOG
|
ENTITY="SOFTransmit"
|
ENTITY="SOFTransmit"
|
FRAMES=ON
|
FRAMES=ON
|
FREEOID=73
|
FREEOID=95
|
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// softransmit\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`timescale 1ns / 1ps\n`include \"usbHostControl_h.v\"\n\n"
|
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n//// ////\n//// softransmit\n//// ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/ ////\n//// ////\n//// Module Description: ////\n//// \n//// ////\n//// To Do: ////\n//// \n//// ////\n//// Author(s): ////\n//// - Steve Fielding, sfielding@base2designs.com ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//// ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG ////\n//// ////\n//// This source file may be used and distributed without ////\n//// restriction provided that this copyright statement is not ////\n//// removed from the file and that any derivative work contains ////\n//// the original copyright notice and the associated disclaimer. ////\n//// ////\n//// This source file is free software; you can redistribute it ////\n//// and/or modify it under the terms of the GNU Lesser General ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any ////\n//// later version. ////\n//// ////\n//// This source is distributed in the hope that it will be ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////\n//// PURPOSE. See the GNU Lesser General Public License for more ////\n//// details. ////\n//// ////\n//// You should have received a copy of the GNU Lesser General ////\n//// Public License along with this source; if not, download it ////\n//// from http://www.opencores.org/lgpl.shtml ////\n//// ////\n//////////////////////////////////////////////////////////////////////\n//\n`timescale 1ns / 1ps\n`include \"usbHostControl_h.v\"\n\n"
|
END
|
END
|
BUNDLES
|
BUNDLES
|
B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0
|
B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1 "Arial" 0
|
B T "Conditions" 0,0,0 0 0 0 255,255,255 0 3333 0 0110 1 "Arial" 0
|
B T "Conditions" 0,0,0 0 0 0 255,255,255 0 3333 0 0110 1 "Arial" 0
|
| Line 62... |
Line 62... |
I 34 0 2 Builtin InPort | 85672,219426 "" ""
|
I 34 0 2 Builtin InPort | 85672,219426 "" ""
|
L 35 34 0 TEXT "Labels" | 91672,219426 1 0 0 "SOFSyncEn"
|
L 35 34 0 TEXT "Labels" | 91672,219426 1 0 0 "SOFSyncEn"
|
L 40 41 0 TEXT "Labels" | 89735,214646 1 0 0 "SOFSent"
|
L 40 41 0 TEXT "Labels" | 89735,214646 1 0 0 "SOFSent"
|
I 41 0 2 Builtin OutPort | 83735,214646 "" ""
|
I 41 0 2 Builtin OutPort | 83735,214646 "" ""
|
K 44 41 0 TEXT "Comments" | 107898,214935 1 0 0 "single cycle pulse"
|
K 44 41 0 TEXT "Comments" | 107898,214935 1 0 0 "single cycle pulse"
|
A 45 9 2 TEXT "Actions" | 136108,187846 1 0 0 "SOFSent <= 1'b0;\nSOFTimerClr <= 1'b0;\nsendPacketArbiterReq <= 1'b0;\nsendPacketWEn <= 1'b0;"
|
A 45 9 2 TEXT "Actions" | 136108,187846 1 0 0 "SOFSent <= 1'b0;\nSOFTimerClr <= 1'b0;\nsendPacketArbiterReq <= 1'b0;\nsendPacketWEn <= 1'b0;\ni <= 8'h00;"
|
L 46 47 0 TEXT "Labels" | 89987,210042 1 0 0 "SOFTimerClr"
|
L 46 47 0 TEXT "Labels" | 89987,210042 1 0 0 "SOFTimerClr"
|
I 47 0 2 Builtin OutPort | 83987,210042 "" ""
|
I 47 0 2 Builtin OutPort | 83987,210042 "" ""
|
K 49 47 0 TEXT "Comments" | 111272,209575 1 0 0 "Single cycle pulse"
|
K 49 47 0 TEXT "Comments" | 111272,209575 1 0 0 "Single cycle pulse"
|
A 50 26 4 TEXT "Actions" | 141965,16918 1 0 0 "sendPacketWEn <= 1'b0;\nSOFTimerClr <= 1'b0;\nSOFSent <= 1'b0;"
|
A 50 26 4 TEXT "Actions" | 141965,16918 1 0 0 "sendPacketWEn <= 1'b0;\nSOFTimerClr <= 1'b0;\nSOFSent <= 1'b0;"
|
W 51 6 0 26 11 BEZIER "Transitions" | 117404,14128 103585,14128 76675,12449 68441,16586\
|
|
60208,20724 54912,37274 53629,49148 52346,61023\
|
|
52495,91978 54333,104221 56172,116465 66907,131666\
|
|
73940,137333 80974,143001 92272,144264 98160,144352\
|
|
104049,144440 109926,143957 113732,143626
|
|
L 53 54 0 TEXT "Labels" | 206335,250729 1 0 0 "clk"
|
L 53 54 0 TEXT "Labels" | 206335,250729 1 0 0 "clk"
|
I 54 0 1 Builtin InPort | 200335,250729 "" ""
|
I 54 0 1 Builtin InPort | 200335,250729 "" ""
|
C 55 17 0 TEXT "Conditions" | 98239,182492 1 0 0 "rst"
|
C 55 17 0 TEXT "Conditions" | 98239,182492 1 0 0 "rst"
|
I 56 0 130 Builtin InPort | 200475,245251 "" ""
|
I 56 0 130 Builtin InPort | 200475,245251 "" ""
|
L 57 56 0 TEXT "Labels" | 206475,245251 1 0 0 "rst"
|
L 57 56 0 TEXT "Labels" | 206475,245251 1 0 0 "rst"
|
| Line 83... |
Line 78... |
L 59 58 0 TEXT "Labels" | 38035,210006 1 0 0 "sendPacketRdy"
|
L 59 58 0 TEXT "Labels" | 38035,210006 1 0 0 "sendPacketRdy"
|
I 60 0 2 Builtin InPort | 85642,229951 "" ""
|
I 60 0 2 Builtin InPort | 85642,229951 "" ""
|
L 61 60 0 TEXT "Labels" | 91642,229951 1 0 0 "SOFEnable"
|
L 61 60 0 TEXT "Labels" | 91642,229951 1 0 0 "SOFEnable"
|
I 62 0 2 Builtin OutPort | 29880,214737 "" ""
|
I 62 0 2 Builtin OutPort | 29880,214737 "" ""
|
L 63 62 0 TEXT "Labels" | 35880,214737 1 0 0 "sendPacketArbiterReq"
|
L 63 62 0 TEXT "Labels" | 35880,214737 1 0 0 "sendPacketArbiterReq"
|
|
A 76 75 16 TEXT "Actions" | 55404,31002 1 0 0 "i <= 8'h00;"
|
|
W 75 6 0 26 74 BEZIER "Transitions" | 117387,14280 106719,14616 86172,13920 78234,17868\
|
|
70296,21816 59880,36936 57948,44622 56016,52308\
|
|
59778,66554 61122,74366
|
|
S 74 6 20480 ELLIPSE "States" | 63408,80448 6500 6500
|
|
L 73 74 0 TEXT "State Labels" | 63408,80448 1 0 0 "DLY_SOF_CHK1\n/5/"
|
K 69 60 0 TEXT "Comments" | 78222,224799 1 0 0 "After host software asserts SOFEnable, must wait TBD time before asserting SOFSyncEn"
|
K 69 60 0 TEXT "Comments" | 78222,224799 1 0 0 "After host software asserts SOFEnable, must wait TBD time before asserting SOFSyncEn"
|
I 64 0 2 Builtin InPort | 32202,219273 "" ""
|
I 64 0 2 Builtin InPort | 32202,219273 "" ""
|
L 65 64 0 TEXT "Labels" | 38202,219273 1 0 0 "sendPacketArbiterGnt"
|
L 65 64 0 TEXT "Labels" | 38202,219273 1 0 0 "sendPacketArbiterGnt"
|
A 67 51 16 TEXT "Actions" | 33349,35565 1 0 0 "sendPacketArbiterReq <= 1'b0;"
|
|
A 68 19 16 TEXT "Actions" | 101850,122190 1 0 0 "sendPacketArbiterReq <= 1'b1;"
|
A 68 19 16 TEXT "Actions" | 101850,122190 1 0 0 "sendPacketArbiterReq <= 1'b1;"
|
W 70 6 8194 15 26 BEZIER "Transitions" | 117343,63205 114476,60245 108317,54810 106883,51064\
|
W 70 6 8194 15 26 BEZIER "Transitions" | 117343,63205 114476,60245 108317,54810 106883,51064\
|
105450,47318 105450,38252 107207,34228 108965,30205\
|
105450,47318 105450,38252 107207,34228 108965,30205\
|
115846,23167 119361,19652
|
115846,23167 119361,19652
|
C 71 70 0 TEXT "Conditions" | 81824,61424 1 0 0 "SOFEnable == 1'b0"
|
C 71 70 0 TEXT "Conditions" | 81824,61424 1 0 0 "SOFEnable == 1'b0"
|
A 72 70 16 TEXT "Actions" | 88430,42600 1 0 0 "SOFTimerClr <= 1'b1;"
|
A 72 70 16 TEXT "Actions" | 88430,42600 1 0 0 "SOFTimerClr <= 1'b1;"
|
|
L 78 79 0 TEXT "State Labels" | 54655,123733 1 0 0 "DLY_SOF_CHK2\n/6/"
|
|
S 79 6 24576 ELLIPSE "States" | 54655,123733 6500 6500
|
|
W 82 6 0 74 79 BEZIER "Transitions" | 61272,86583 60002,89345 56169,113512 55585,117302
|
|
C 85 75 0 TEXT "Conditions" | 66368,14007 1 0 0 "sendPacketRdy == 1'b1"
|
|
L 86 87 0 TEXT "Labels" | 50362,241979 1 0 0 "i[7:0]"
|
|
I 87 0 130 Builtin Signal | 47362,241979 "" ""
|
|
A 88 74 4 TEXT "Actions" | 81838,80970 1 0 0 "i <= i + 1'b1;"
|
|
C 90 82 0 TEXT "Conditions" | 61793,96219 1 0 0 "i==8'hff"
|
|
A 91 82 16 TEXT "Actions" | 49949,109037 1 0 0 "sendPacketArbiterReq <= 1'b0;\ni <= 8'h00;"
|
|
W 92 6 0 79 11 BEZIER "Transitions" | 60486,126602 74574,130193 99716,139754 113804,143345
|
|
A 93 79 4 TEXT "Actions" | 72777,123623 1 0 0 "i <= i + 1'b1;"
|
|
C 94 92 0 TEXT "Conditions" | 68357,136883 1 0 0 "i==8'hff"
|
END
|
END
|
