OpenCores
URL https://opencores.org/ocsvn/usbhostslave/usbhostslave/trunk

Subversion Repositories usbhostslave

[/] [usbhostslave/] [trunk/] [RTL/] [serialInterfaceEngine/] [processTxByte.asf] - Diff between revs 2 and 5

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Rev 2 Rev 5
Line 1... Line 1...
VERSION=1.19
VERSION=1.15
HEADER
HEADER
FILE="processTxByte.asf"
FILE="processTxByte.asf"
FID=4094ffa4
FID=4094ffa4
LANGUAGE=VERILOG
LANGUAGE=VERILOG
ENTITY="processTxByte"
ENTITY="processTxByte"
 
FRAMES=ON
FREEOID=1000
FREEOID=1000
"LIBRARIES=`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n"
"LIBRARIES=//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// processTxByte\n////                                                              ////\n//// This file is part of the usbhostslave opencores effort.\n//// http://www.opencores.org/cores/usbhostslave/                 ////\n////                                                              ////\n//// Module Description:                                          ////\n//// \n////                                                              ////\n//// To Do:                                                       ////\n//// \n////                                                              ////\n//// Author(s):                                                   ////\n//// - Steve Fielding, sfielding@base2designs.com                 ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n////                                                              ////\n//// Copyright (C) 2004 Steve Fielding and OPENCORES.ORG          ////\n////                                                              ////\n//// This source file may be used and distributed without         ////\n//// restriction provided that this copyright statement is not    ////\n//// removed from the file and that any derivative work contains  ////\n//// the original copyright notice and the associated disclaimer. ////\n////                                                              ////\n//// This source file is free software; you can redistribute it   ////\n//// and/or modify it under the terms of the GNU Lesser General   ////\n//// Public License as published by the Free Software Foundation; ////\n//// either version 2.1 of the License, or (at your option) any   ////\n//// later version.                                               ////\n////                                                              ////\n//// This source is distributed in the hope that it will be       ////\n//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////\n//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////\n//// PURPOSE. See the GNU Lesser General Public License for more  ////\n//// details.                                                     ////\n////                                                              ////\n//// You should have received a copy of the GNU Lesser General    ////\n//// Public License along with this source; if not, download it   ////\n//// from http://www.opencores.org/lgpl.shtml                     ////\n////                                                              ////\n//////////////////////////////////////////////////////////////////////\n//\n// $Id: processTxByte.asf,v 1.2 2004-12-18 14:36:15 sfielding Exp $\n//\n// CVS Revision History\n//\n// $Log: not supported by cvs2svn $\n//\n`timescale 1ns / 1ps\n`include \"usbSerialInterfaceEngine_h.v\"\n`include \"usbConstants_h.v\"\n"
MULTIPLEARCHSTATUS=FALSE
 
SYNTHESISATTRIBUTES=TRUE
 
HEADER_PARAM="AUTHOR,Steve"
 
HEADER_PARAM="COMPANY,Base2Designs"
 
HEADER_PARAM="CREATIONDATE,4/9/2004"
 
HEADER_PARAM="TITLE,processTxByte"
 
END
END
BUNDLES
BUNDLES
B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
B T "Declarations" 0,0,255 0 0 1 255,255,255 0 3333 0 0000 1  "Arial" 0
B T "Conditions" 236,0,236 0 0 0 255,255,255 0 3333 0 0110 0 "Arial" 0
B T "Conditions" 0,0,0 0 0 0 255,255,255 0 3333 0 0110 1  "Arial" 0
B F "States" 0,0,0 0 0 1 0,255,0 1 3527 1480 0000 0 "Arial" 0
B F "States" 0,0,0 0 0 1 0,255,0 1 3527 1480 0000 0 "Arial" 0
B T "Actions" 0,0,0 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
B T "Actions" 0,0,0 0 0 1 255,255,255 0 3333 0 0000 1  "Arial" 0
B T "Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 0 "Arial" 0
B T "Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 1  "Arial" 0
B L "Transitions" 0,0,0 0 0 1 0,0,0 1 3527 1480 0000 0 "Arial" 0
B L "Transitions" 0,0,0 0 0 1 0,0,0 1 3527 1480 0000 0 "Arial" 0
B F "Ports" 0,0,0 0 0 1 0,255,255 1 3527 1480 0000 0 "Arial" 0
B F "Ports" 0,0,0 0 0 1 0,255,255 1 3527 1480 0000 0 "Arial" 0
B L "Errors" 255,0,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
B L "Errors" 255,0,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
B T "State Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 0 "Arial" 4
B T "State Labels" 0,0,0 0 0 0 0,0,0 0 3333 0 0000 1  "Arial" 4
B F "Current State" 255,255,0 0 0 1 255,255,0 1 3527 1480 0000 0 "Arial" 0
B F "Current State" 255,255,0 0 0 1 255,255,0 1 3527 1480 0000 0 "Arial" 0
B T "Comments" 157,157,157 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
B T "Comments" 157,157,157 0 0 1 255,255,255 0 3333 0 0000 0 "Arial" 0
B L "Info" 0,255,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
B L "Info" 0,255,0 0 3 1 255,255,255 1 3527 1480 0000 0 "Arial" 0
B F "Junction" 0,0,0 0 0 1 255,0,0 1 3527 1480 0000 0 "Arial" 0
B F "Junction" 0,0,0 0 0 1 255,0,0 1 3527 1480 0000 0 "Arial" 0
B F "Initial State Indicator" 0,0,0 0 0 1 240,140,40 1 3527 1480 0000 0 "Arial" 0
B F "Initial State Indicator" 0,0,0 0 0 1 240,140,40 1 3527 1480 0000 0 "Arial" 0
END
END
INSTHEADER 1
INSTHEADER 1
PAGE 0,0 215900,279400
PAGE 12700,12700 215900,279400
MARGINS 12700,12700 12700,12700
UPPERLEFT 0,0
 
GRID=OFF
 
GRIDSIZE 5000,5000 10000,10000
END
END
INSTHEADER 874
INSTHEADER 874
PAGE 0,0 215900,279400
PAGE 12700,12700 215900,279400
MARGINS 12700,12700 12700,12700
UPPERLEFT 0,0
 
GRID=OFF
 
GRIDSIZE 0,0 10000,10000
END
END
INSTHEADER 887
INSTHEADER 887
PAGE 0,0 215900,279400
PAGE 12700,12700 215900,279400
MARGINS 12700,12700 12700,12700
UPPERLEFT 0,0
 
GRID=OFF
 
GRIDSIZE 0,0 10000,10000
END
END
INSTHEADER 994
INSTHEADER 994
PAGE 0,0 215900,279400
PAGE 12700,12700 215900,279400
MARGINS 12700,12700 12700,12700
UPPERLEFT 0,0
 
GRID=OFF
 
GRIDSIZE 0,0 10000,10000
END
END
OBJECTS
OBJECTS
L 831 832 0 TEXT "Labels" | 21372,222732 1 0 0 "USBWireWEn"
 
I 830 0 2 Builtin OutPort | 15372,227372 "" ""
 
L 829 830 0 TEXT "Labels" | 21372,227372 1 0 0 "USBWireReq"
 
I 828 0 2 Builtin InPort | 17692,231780 "" ""
 
L 827 828 0 TEXT "Labels" | 23692,231780 1 0 0 "USBWireGnt"
 
I 826 0 2 Builtin OutPort | 15372,236188 "" ""
 
L 825 826 0 TEXT "Labels" | 21140,235724 1 0 0 "USBWireCtrl"
 
I 824 0 2 Builtin OutPort | 15604,240596 "" ""
 
L 823 824 0 TEXT "Labels" | 21604,240596 1 0 0 "USBWireData[1:0]"
 
I 822 0 2 Builtin InPort | 20959,250108 "" ""
 
L 821 822 0 TEXT "Labels" | 26959,250108 1 0 0 "TxByteCtrlIn[7:0]"
 
I 820 0 2 Builtin InPort | 20959,254515 "" ""
 
L 819 820 0 TEXT "Labels" | 26959,254515 1 0 0 "TxByteIn[7:0]"
 
I 818 0 2 Builtin OutPort | 18852,259388 "" ""
 
L 817 818 0 TEXT "Labels" | 24852,259388 1 0 0 "processTxByteRdy"
 
I 816 0 2 Builtin InPort | 20959,264028 "" ""
 
W 13 6 0 12 9 BEZIER "Transitions" | 22016,204762 26512,204498 31110,200468 35074,198608
 
I 12 6 0 Builtin Reset | 22016,204762
 
S 9 6 0 ELLIPSE "States" | 41526,197822 6500 6500
 
L 8 9 0 TEXT "State Labels" | 41526,197822 1 0 0 "START_PTBY\n/0/"
 
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0 "Arial" 0 | 93869,266185 1 0 0 "Module: processTxByte"
 
F 6 0 671089152 185 0 "" 0 RECT 0,0,0 0 0 1 255,255,255 0 | 14988,15700 199488,210298
 
L 7 6 0 TEXT "Labels" | 57079,207538 1 0 0 "prcTxB"
L 7 6 0 TEXT "Labels" | 57079,207538 1 0 0 "prcTxB"
I 847 0 2 Builtin InPort | 125241,221252 "" ""
F 6 0 671089152 185 0 RECT 0,0,0 0 0 1 255,255,255 0 | 14988,15700 199488,210298
I 846 0 2 Builtin InPort | 125108,216932 "" ""
G 1 0 0 TEXT 0,0,0 0 0 0 255,255,255 0 3527 1480 0000 0  "Arial" 0 | 93869,266185 1 0 0 "Module: processTxByte"
L 845 846 0 TEXT "Labels" | 131108,216932 1 0 0 "KBit[1:0]"
L 8 9 0 TEXT "State Labels" | 41526,197822 1 0 0 "START_PTBY\n/0/"
I 844 0 2 Builtin Signal | 69660,223196 "" ""
S 9 6 0 ELLIPSE "States" | 41526,197822 6500 6500
L 843 844 0 TEXT "Labels" | 72660,223196 1 0 0 "i[3:0]"
I 12 6 0 Builtin Reset | 22016,204762
I 834 0 2 Builtin InPort | 17692,218324 "" ""
W 13 6 0 12 9 BEZIER "Transitions" | 22016,204762 26512,204498 31110,200468 35074,198608
L 833 834 0 TEXT "Labels" | 23692,218324 1 0 0 "USBWireRdy"
I 816 0 2 Builtin InPort | 20959,264028 "" ""
 
L 817 818 0 TEXT "Labels" | 24852,259388 1 0 0 "processTxByteRdy"
 
I 818 0 2 Builtin OutPort | 18852,259388 "" ""
 
L 819 820 0 TEXT "Labels" | 26959,254515 1 0 0 "TxByteIn[7:0]"
 
I 820 0 130 Builtin InPort | 20959,254515 "" ""
 
L 821 822 0 TEXT "Labels" | 26959,250108 1 0 0 "TxByteCtrlIn[7:0]"
 
I 822 0 130 Builtin InPort | 20959,250108 "" ""
 
L 823 824 0 TEXT "Labels" | 21604,240596 1 0 0 "USBWireData[1:0]"
 
I 824 0 130 Builtin OutPort | 15604,240596 "" ""
 
L 825 826 0 TEXT "Labels" | 21140,235724 1 0 0 "USBWireCtrl"
 
I 826 0 2 Builtin OutPort | 15372,236188 "" ""
 
L 827 828 0 TEXT "Labels" | 23692,231780 1 0 0 "USBWireGnt"
 
I 828 0 2 Builtin InPort | 17692,231780 "" ""
 
L 829 830 0 TEXT "Labels" | 21372,227372 1 0 0 "USBWireReq"
 
I 830 0 2 Builtin OutPort | 15372,227372 "" ""
 
L 831 832 0 TEXT "Labels" | 21372,222732 1 0 0 "USBWireWEn"
I 832 0 2 Builtin OutPort | 15372,222732 "" ""
I 832 0 2 Builtin OutPort | 15372,222732 "" ""
 
L 833 834 0 TEXT "Labels" | 23692,218324 1 0 0 "USBWireRdy"
 
I 834 0 2 Builtin InPort | 17692,218324 "" ""
 
L 843 844 0 TEXT "Labels" | 72660,223196 1 0 0 "i[3:0]"
 
I 844 0 130 Builtin Signal | 69660,223196 "" ""
 
L 845 846 0 TEXT "Labels" | 131108,216932 1 0 0 "KBit[1:0]"
 
I 846 0 130 Builtin InPort | 125108,216932 "" ""
 
I 847 0 130 Builtin InPort | 125241,221252 "" ""
L 848 847 0 TEXT "Labels" | 131241,221252 1 0 0 "JBit[1:0]"
L 848 847 0 TEXT "Labels" | 131241,221252 1 0 0 "JBit[1:0]"
L 864 865 0 TEXT "State Labels" | 43124,173002 1 0 0 "PTBY_WAIT_EN\n/1/"
 
S 865 6 4096 ELLIPSE "States" | 43124,173002 6500 6500
 
W 866 6 0 9 865 BEZIER "Transitions" | 41794,191349 41968,188029 42333,182785 42507,179465
 
W 869 6 0 865 994 BEZIER "Transitions" | 43506,166514 43972,160806 44382,144193 44848,138485
 
C 870 869 0 TEXT "Conditions" | 44743,165433 1 0 0 "processTxByteWEn == 1'b1"
 
A 871 869 16 TEXT "Actions" | 40695,156023 1 0 0 "processTxByteRdy <= 1'b0;\nTxByte <= TxByteIn;\nTxByteCtrl <= TxByteCtrlIn;"
 
A 872 865 4 TEXT "Actions" | 55007,174633 1 0 0 "processTxByteRdy <= 1'b1;"
 
L 873 874 0 TEXT "State Labels" | 48483,85161 1 0 0 "SEND_BYTE"
 
S 874 6 8196 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 48483,85161 6500 6500
S 874 6 8196 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 48483,85161 6500 6500
H 880 874 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
L 873 874 0 TEXT "State Labels" | 48483,85161 1 0 0 "SEND_BYTE"
I 883 880 0 Builtin Entry | 38120,248040
A 872 865 4 TEXT "Actions" | 55007,174633 1 0 0 "processTxByteRdy <= 1'b1;"
I 884 880 0 Builtin Exit | 178131,23271
A 871 869 16 TEXT "Actions" | 40695,156023 1 0 0 "processTxByteRdy <= 1'b0;\nTxByte <= TxByteIn;\nTxByteCtrl <= TxByteCtrlIn;"
W 885 880 0 883 901 BEZIER "Transitions" | 42416,248040 47778,233267 52771,218493 58133,203720
C 870 869 0 TEXT "Conditions" | 44743,165433 1 0 0 "processTxByteWEn == 1'b1"
H 895 887 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
W 869 6 0 865 994 BEZIER "Transitions" | 43506,166514 43972,160806 44382,144193 44848,138485
S 887 6 12292 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 49971,45111 6500 6500
W 866 6 0 9 865 BEZIER "Transitions" | 41794,191349 41968,188029 42333,182785 42507,179465
 
S 865 6 4096 ELLIPSE "States" | 43124,173002 6500 6500
 
L 864 865 0 TEXT "State Labels" | 43124,173002 1 0 0 "PTBY_WAIT_EN\n/1/"
L 888 887 0 TEXT "State Labels" | 49971,45111 1 0 0 "STOP"
L 888 887 0 TEXT "State Labels" | 49971,45111 1 0 0 "STOP"
W 896 6 8194 994 874 BEZIER "Transitions" | 45464,131529 46046,122326 47391,100834 47973,91631
S 887 6 12292 ELLIPSE 0,0,0 0 0 1 0,255,255 1 | 49971,45111 6500 6500
W 897 6 0 874 887 BEZIER "Transitions" | 48237,78679 48703,71573 48867,58679 49333,51573
H 895 887 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
 
W 885 880 0 883 901 BEZIER "Transitions" | 42416,248040 47778,233267 52771,218493 58133,203720
 
I 884 880 0 Builtin Exit | 178131,23271
 
I 883 880 0 Builtin Entry | 38120,248040
 
H 880 874 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
 
C 911 909 0 TEXT "Conditions" | 63744,160236 1 0 0 "USBWireRdy == 1'b1"
 
W 909 880 0 904 906 BEZIER "Transitions" | 62562,160798 63190,153505 63227,143345 63855,136052
 
W 908 880 0 901 904 BEZIER "Transitions" | 61196,191380 61824,178554 61181,186583 61809,173757
 
S 906 880 24576 ELLIPSE "States" | 64960,129650 6500 6500
 
L 905 906 0 TEXT "State Labels" | 64960,129650 1 0 0 "CHK\n/4/"
 
S 904 880 20480 ELLIPSE "States" | 62200,167285 6500 6500
 
L 903 904 0 TEXT "State Labels" | 62200,167285 1 0 0 "WAIT_RDY\n/3/"
 
A 902 901 4 TEXT "Actions" | 87131,216544 1 0 0 "i <= i + 1'b1;\nTxByte <= {1'b0, TxByte[7:1] };\nif (TxByte[0] == 1'b1)                      //If this bit is 1, then\n  TXOneCount <= TXOneCount + 1'b1;          //increment 'TXOneCount'\nelse                                        //else this is a zero bit\nbegin\n  TXOneCount <= 4'h1;                            //reset 'TXOneCount'\n  if (TXLineState == JBit) \n    TXLineState <= KBit; //toggle the line state\n  else \n    TXLineState <= JBit;\nend"
 
S 901 880 16384 ELLIPSE "States" | 60963,197870 6500 6500
 
L 900 901 0 TEXT "State Labels" | 60963,197870 1 0 0 "UPDATE_BYTE\n/2/"
W 898 6 0 887 865 BEZIER "Transitions" | 43587,46330 39277,46796 30872,48264 28251,49254\
W 898 6 0 887 865 BEZIER "Transitions" | 43587,46330 39277,46796 30872,48264 28251,49254\
                                         25630,50244 23766,53274 22950,67894 22135,82515\
                                         25630,50244 23766,53274 22950,67894 22135,82515\
                                         20737,137969 21261,153813 21785,169657 25281,177579\
                                         20737,137969 21261,153813 21785,169657 25281,177579\
                                         27028,179792 28775,182006 32271,182938 33727,182355\
                                         27028,179792 28775,182006 32271,182938 33727,182355\
                                         35183,181773 37321,179186 38486,177555
                                         35183,181773 37321,179186 38486,177555
L 900 901 0 TEXT "State Labels" | 60963,197870 1 0 0 "UPDATE_BYTE\n/2/"
W 897 6 0 874 887 BEZIER "Transitions" | 48237,78679 48703,71573 48867,58679 49333,51573
S 901 880 16384 ELLIPSE "States" | 60963,197870 6500 6500
W 896 6 8194 994 874 BEZIER "Transitions" | 45464,131529 46046,122326 47391,100834 47973,91631
A 902 901 4 TEXT "Actions" | 75251,207304 1 0 0 "i <= i + 1'b1;\nTxByte <= {1'b0, TxByte[7:1] };\nif (TxByte[0] == 1'b1)                      //If this bit is 1, then\n  TXOneCount <= TXOneCount + 1'b1;          //increment 'TXOneCount'\nelse                                        //else this is a zero bit\nbegin\n  TXOneCount <= 4'h1;                            //reset 'TXOneCount'\n  if (TXLineState == JBit) TXLineState <= KBit; //toggle the line state\n  else TXLineState <= JBit;\nend"
 
L 903 904 0 TEXT "State Labels" | 62200,167285 1 0 0 "WAIT_RDY\n/3/"
 
S 904 880 20480 ELLIPSE "States" | 62200,167285 6500 6500
 
L 905 906 0 TEXT "State Labels" | 64960,129650 1 0 0 "CHK\n/4/"
 
S 906 880 24576 ELLIPSE "States" | 64960,129650 6500 6500
 
W 908 880 0 901 904 BEZIER "Transitions" | 61196,191380 61824,178554 61181,186583 61809,173757
 
W 909 880 0 904 906 BEZIER "Transitions" | 62562,160798 63190,153505 63227,143345 63855,136052
 
C 911 909 0 TEXT "Conditions" | 63744,160236 1 0 0 "USBWireRdy == 1'b1"
 
A 912 909 16 TEXT "Actions" | 49573,154836 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= TXLineState;\nUSBWireCtrl <= `DRIVE;"
 
A 913 906 4 TEXT "Actions" | 83555,132365 1 0 0 "USBWireWEn <= 1'b0;"
 
L 914 915 0 TEXT "State Labels" | 67031,103511 1 0 0 "BIT_STUFF\n/5/"
 
S 915 880 28672 ELLIPSE "States" | 67031,103511 6500 6500
 
L 916 917 0 TEXT "State Labels" | 69840,83253 1 0 0 "WAIT_RDY2\n/6/"
 
S 917 880 32768 ELLIPSE "States" | 69840,83253 6500 6500
 
W 918 880 8193 906 915 BEZIER "Transitions" | 65281,123173 65470,118240 66017,114889 66206,109956
 
C 919 918 0 TEXT "Conditions" | 67653,122954 1 0 0 "TXOneCount == 4'h6"
 
A 920 915 4 TEXT "Actions" | 82970,116161 1 0 0 "TXOneCount <= 4'h1;                                //reset 'TXOneCount'\nif (TXLineState == JBit) TXLineState <= KBit;   //toggle the line state\nelse TXLineState <= JBit;"
 
W 921 880 0 917 923 BEZIER "Transitions" | 70442,76789 71070,69496 71344,53592 71972,46299
 
A 922 921 16 TEXT "Actions" | 67128,66767 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= TXLineState;\nUSBWireCtrl <= `DRIVE;"
 
S 923 880 36864 ELLIPSE "States" | 72651,39838 6500 6500
 
A 924 923 4 TEXT "Actions" | 91246,42553 1 0 0 "USBWireWEn <= 1'b0;"
 
C 925 921 0 TEXT "Conditions" | 71683,75885 1 0 0 "USBWireRdy == 1'b1"
 
L 926 923 0 TEXT "State Labels" | 72651,39838 1 0 0 "CHK_FIN\n/7/"
 
W 927 880 0 915 917 BEZIER "Transitions" | 67528,97031 67912,94983 68323,91700 68707,89652
W 927 880 0 915 917 BEZIER "Transitions" | 67528,97031 67912,94983 68323,91700 68707,89652
W 928 880 8193 923 884 BEZIER "Transitions" | 77516,35528 81612,32648 88778,27048 101066,25480\
L 926 923 0 TEXT "State Labels" | 72651,39838 1 0 0 "CHK_FIN\n/7/"
                                              113354,23912 154429,23527 174909,23271
C 925 921 0 TEXT "Conditions" | 71683,75885 1 0 0 "USBWireRdy == 1'b1"
C 929 928 0 TEXT "Conditions" | 90570,32872 1 0 0 "i == 4'h8"
A 924 923 4 TEXT "Actions" | 91246,42553 1 0 0 "USBWireWEn <= 1'b0;"
 
S 923 880 36864 ELLIPSE "States" | 72651,39838 6500 6500
 
A 922 921 16 TEXT "Actions" | 67128,66767 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= TXLineState;\nUSBWireCtrl <= `DRIVE;"
 
W 921 880 0 917 923 BEZIER "Transitions" | 70442,76789 71070,69496 71344,53592 71972,46299
 
A 920 915 4 TEXT "Actions" | 82970,116161 1 0 0 "TXOneCount <= 4'h1;                                //reset 'TXOneCount'\nif (TXLineState == JBit) \n  TXLineState <= KBit;   //toggle the line state\nelse \n  TXLineState <= JBit;"
 
C 919 918 0 TEXT "Conditions" | 67653,122954 1 0 0 "TXOneCount == 4'h6"
 
W 918 880 8193 906 915 BEZIER "Transitions" | 65281,123173 65470,118240 66017,114889 66206,109956
 
S 917 880 32768 ELLIPSE "States" | 69840,83253 6500 6500
 
L 916 917 0 TEXT "State Labels" | 69840,83253 1 0 0 "WAIT_RDY2\n/6/"
 
S 915 880 28672 ELLIPSE "States" | 67031,103511 6500 6500
 
L 914 915 0 TEXT "State Labels" | 67031,103511 1 0 0 "BIT_STUFF\n/5/"
 
A 913 906 4 TEXT "Actions" | 83555,132365 1 0 0 "USBWireWEn <= 1'b0;"
 
A 912 909 16 TEXT "Actions" | 49573,154836 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= TXLineState;\nUSBWireCtrl <= `DRIVE;"
 
L 943 942 0 TEXT "State Labels" | 74939,175324 1 0 0 "SND_SE0_2\n/9/"
 
S 942 895 45056 ELLIPSE "States" | 74939,175324 6500 6500
 
C 941 940 0 TEXT "Conditions" | 111729,100310 1 0 0 "USBWireGnt == 1'b1"
 
W 940 6 0 936 874 BEZIER "Transitions" | 142661,111545 128565,105371 68178,94636 54082,88462
 
A 939 937 16 TEXT "Actions" | 80687,127638 1 0 0 "TXOneCount <= 1;       \nTXLineState <= JBit;\nUSBWireReq <= 1'b1;"
 
C 938 937 0 TEXT "Conditions" | 56024,136519 1 0 0 "TxByteCtrlIn == `DATA_START"
 
W 937 6 8193 994 936 BEZIER "Transitions" | 48651,134144 59369,131814 131883,116838 142601,114508
 
S 936 6 40960 ELLIPSE "States" | 148958,113156 6500 6500
 
L 935 936 0 TEXT "State Labels" | 148958,113156 1 0 0 "PTBY_WAIT_GNT\n/8/"
W 930 880 8194 923 901 BEZIER "Transitions" | 66152,39809 60904,40065 50250,40296 45386,41576\
W 930 880 8194 923 901 BEZIER "Transitions" | 66152,39809 60904,40065 50250,40296 45386,41576\
                                              40522,42856 31562,47464 29098,65320 26634,83176\
                                              40522,42856 31562,47464 29098,65320 26634,83176\
                                              25738,149992 26858,168968 27978,187944 33354,197032\
                                              25738,149992 26858,168968 27978,187944 33354,197032\
                                              36938,198888 40522,200744 49226,198568 51498,198152\
                                              36938,198888 40522,200744 49226,198568 51498,198152\
                                              53770,197736 54409,198230 54473,198230
                                              53770,197736 54409,198230 54473,198230
L 935 936 0 TEXT "State Labels" | 148958,113156 1 0 0 "PTBY_WAIT_GNT\n/8/"
C 929 928 0 TEXT "Conditions" | 90570,32872 1 0 0 "i == 4'h8"
S 936 6 40960 ELLIPSE "States" | 148958,113156 6500 6500
W 928 880 8193 923 884 BEZIER "Transitions" | 77516,35528 81612,32648 88778,27048 101066,25480\
W 937 6 8193 994 936 BEZIER "Transitions" | 48651,134144 59369,131814 131883,116838 142601,114508
                                              113354,23912 154429,23527 174909,23271
C 938 937 0 TEXT "Conditions" | 56024,136519 1 0 0 "TxByteCtrlIn == `DATA_START"
 
A 939 937 16 TEXT "Actions" | 80687,127638 1 0 0 "TXOneCount <= 1;       \nTXLineState <= JBit;\nUSBWireReq <= 1'b1;"
 
W 940 6 0 936 874 BEZIER "Transitions" | 142661,111545 128565,105371 68178,94636 54082,88462
 
C 941 940 0 TEXT "Conditions" | 111729,100310 1 0 0 "USBWireGnt == 1'b1"
 
S 942 895 45056 ELLIPSE "States" | 74939,175324 6500 6500
 
L 943 942 0 TEXT "State Labels" | 74939,175324 1 0 0 "SND_SE0_2\n/9/"
 
W 944 895 0 948 942 BEZIER "Transitions" | 72730,212275 73358,204982 73632,189078 74260,181785
 
C 945 944 0 TEXT "Conditions" | 73971,211371 1 0 0 "USBWireRdy == 1'b1"
 
A 946 942 4 TEXT "Actions" | 93534,178039 1 0 0 "USBWireWEn <= 1'b0;"
 
A 947 944 16 TEXT "Actions" | 69416,202253 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= `SE0;\nUSBWireCtrl <= `DRIVE;"
 
S 948 895 49152 ELLIPSE "States" | 72128,218739 6500 6500
 
L 949 948 0 TEXT "State Labels" | 72128,218739 1 0 0 "SND_SE0_1\n/10/"
 
L 950 951 0 TEXT "State Labels" | 66294,250403 1 0 0 "CHK\n/11/"
 
S 951 895 53248 ELLIPSE "States" | 66294,250403 6500 6500
 
W 952 895 8193 951 948 BEZIER "Transitions" | 67478,244015 68286,238818 70288,230349 71096,225152
 
C 954 952 0 TEXT "Conditions" | 70699,244255 1 0 0 "TxByteCtrl == `DATA_STOP"
 
S 956 895 57344 ELLIPSE "States" | 78157,132848 6500 6500
 
L 957 956 0 TEXT "State Labels" | 78157,132848 1 0 0 "SND_J\n/12/"
 
W 958 895 0 942 956 BEZIER "Transitions" | 75377,168841 76005,161548 76957,146611 77585,139318
 
A 959 958 16 TEXT "Actions" | 72304,159240 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= `SE0;\nUSBWireCtrl <= `DRIVE;"
A 959 958 16 TEXT "Actions" | 72304,159240 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= `SE0;\nUSBWireCtrl <= `DRIVE;"
A 960 956 4 TEXT "Actions" | 96752,135563 1 0 0 "USBWireWEn <= 1'b0;"
W 958 895 0 942 956 BEZIER "Transitions" | 75377,168841 76005,161548 76957,146611 77585,139318
C 961 958 0 TEXT "Conditions" | 76516,167828 1 0 0 "USBWireRdy == 1'b1"
L 957 956 0 TEXT "State Labels" | 78157,132848 1 0 0 "SND_J\n/12/"
S 962 895 61440 ELLIPSE "States" | 81045,83881 6500 6500
S 956 895 57344 ELLIPSE "States" | 78157,132848 6500 6500
L 963 962 0 TEXT "State Labels" | 81045,83881 1 0 0 "SND_IDLE\n/13/"
C 954 952 0 TEXT "Conditions" | 70699,244255 1 0 0 "TxByteCtrl == `DATA_STOP"
W 964 895 0 956 962 BEZIER "Transitions" | 78681,126377 79309,119084 79833,97641 80461,90348
W 952 895 8193 951 948 BEZIER "Transitions" | 67478,244015 68286,238818 70288,230349 71096,225152
A 965 964 16 TEXT "Actions" | 75410,113723 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= JBit;\nUSBWireCtrl <= `DRIVE;"
S 951 895 53248 ELLIPSE "States" | 66294,250403 6500 6500
A 966 962 4 TEXT "Actions" | 99640,86596 1 0 0 "USBWireWEn <= 1'b0;"
L 950 951 0 TEXT "State Labels" | 66294,250403 1 0 0 "CHK\n/11/"
C 967 964 0 TEXT "Conditions" | 79852,125749 1 0 0 "USBWireRdy == 1'b1"
L 949 948 0 TEXT "State Labels" | 72128,218739 1 0 0 "SND_SE0_1\n/10/"
S 968 895 65536 ELLIPSE "States" | 83969,44131 6500 6500
S 948 895 49152 ELLIPSE "States" | 72128,218739 6500 6500
L 969 968 0 TEXT "State Labels" | 83969,44131 1 0 0 "FIN\n/14/"
A 947 944 16 TEXT "Actions" | 69416,202253 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= `SE0;\nUSBWireCtrl <= `DRIVE;"
W 970 895 0 962 968 BEZIER "Transitions" | 81334,77407 81962,70114 82544,57872 83172,50579
A 946 942 4 TEXT "Actions" | 93534,178039 1 0 0 "USBWireWEn <= 1'b0;"
A 971 970 16 TEXT "Actions" | 77621,69378 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= JBit;\nUSBWireCtrl <= `TRI_STATE;"
C 945 944 0 TEXT "Conditions" | 73971,211371 1 0 0 "USBWireRdy == 1'b1"
A 972 968 4 TEXT "Actions" | 102564,46846 1 0 0 "USBWireWEn <= 1'b0;\nUSBWireReq <= 1'b0; //release the wire"
W 944 895 0 948 942 BEZIER "Transitions" | 72730,212275 73358,204982 73632,189078 74260,181785
C 973 970 0 TEXT "Conditions" | 81643,77033 1 0 0 "USBWireRdy == 1'b1"
 
I 974 895 0 Builtin Exit | 97904,23272
 
W 975 895 0 968 974 BEZIER "Transitions" | 85932,37938 86628,34922 87928,30000 89030,28086\
W 975 895 0 968 974 BEZIER "Transitions" | 85932,37938 86628,34922 87928,30000 89030,28086\
                                           90132,26172 93257,24084 94765,23272
                                           90132,26172 93257,24084 94765,23272
W 991 880 8195 906 884 BEZIER "Transitions" | 69617,134183 72517,135343 77069,138112 90815,138750\
I 974 895 0 Builtin Exit | 97904,23272
                                              104561,139388 153745,139620 168013,138576 182281,137532\
C 973 970 0 TEXT "Conditions" | 81643,77033 1 0 0 "USBWireRdy == 1'b1"
                                              190169,133124 192141,121582 194113,110040 194113,68280\
A 972 968 4 TEXT "Actions" | 102564,46846 1 0 0 "USBWireWEn <= 1'b0;\nUSBWireReq <= 1'b0; //release the wire"
                                              192025,55114 189937,41948 185529,28723 181353,23271
A 971 970 16 TEXT "Actions" | 77621,69378 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= JBit;\nUSBWireCtrl <= `TRI_STATE;"
C 990 989 0 TEXT "Conditions" | 32613,121194 1 0 0 "i != 4'h8"
W 970 895 0 962 968 BEZIER "Transitions" | 81334,77407 81962,70114 82544,57872 83172,50579
W 989 880 8194 906 901 BEZIER "Transitions" | 58978,127109 55150,125485 47040,121872 44082,121756\
L 969 968 0 TEXT "State Labels" | 83969,44131 1 0 0 "FIN\n/14/"
                                              41124,121640 36948,124424 36020,132602 35092,140780\
S 968 895 65536 ELLIPSE "States" | 83969,44131 6500 6500
                                              35556,170708 38166,179350 40776,187992 50140,192687\
C 967 964 0 TEXT "Conditions" | 79852,125749 1 0 0 "USBWireRdy == 1'b1"
                                              55128,195007
A 966 962 4 TEXT "Actions" | 99640,86596 1 0 0 "USBWireWEn <= 1'b0;"
 
A 965 964 16 TEXT "Actions" | 75410,113723 1 0 0 "USBWireWEn <= 1'b1;\nUSBWireData <= JBit;\nUSBWireCtrl <= `DRIVE;"
 
W 964 895 0 956 962 BEZIER "Transitions" | 78681,126377 79309,119084 79833,97641 80461,90348
 
L 963 962 0 TEXT "State Labels" | 81045,83881 1 0 0 "SND_IDLE\n/13/"
 
S 962 895 61440 ELLIPSE "States" | 81045,83881 6500 6500
 
C 961 958 0 TEXT "Conditions" | 76516,167828 1 0 0 "USBWireRdy == 1'b1"
 
A 960 956 4 TEXT "Actions" | 96752,135563 1 0 0 "USBWireWEn <= 1'b0;"
 
I 987 0 130 Builtin Signal | 69201,241421 "" ""
 
L 986 987 0 TEXT "Labels" | 72201,241421 1 0 0 "TXOneCount[3:0]"
 
I 985 0 130 Builtin Signal | 69201,236994 "" ""
 
L 984 985 0 TEXT "Labels" | 72201,236994 1 0 0 "TXLineState[1:0]"
 
I 983 0 130 Builtin Signal | 69201,232334 "" ""
 
L 982 983 0 TEXT "Labels" | 72201,232334 1 0 0 "TxByteCtrl[7:0]"
 
I 981 0 130 Builtin Signal | 69434,227674 "" ""
 
L 980 981 0 TEXT "Labels" | 72434,227674 1 0 0 "TxByte[7:0]"
 
A 979 9 4 TEXT "Actions" | 108416,207754 1 0 0 "processTxByteRdy <= 1'b0;\nUSBWireData <= 2'b00;\nUSBWireCtrl <= `TRI_STATE;\nUSBWireReq <= 1'b0;\nUSBWireWEn <= 1'b0;\ni <= 4'h0;\nTxByte <= 8'h00;\nTxByteCtrl <= 8'h00;\nTXLineState <= 2'b0;\nTXOneCount <= 4'h0;"
 
W 978 895 0 977 951 BEZIER "Transitions" | 38683,259216 44135,257418 54598,254006 60050,252208
 
I 977 895 0 Builtin Entry | 34452,259216
W 976 895 8194 951 974 BEZIER "Transitions" | 61300,246245 53760,240097 39092,228012 35032,223372\
W 976 895 8194 951 974 BEZIER "Transitions" | 61300,246245 53760,240097 39092,228012 35032,223372\
                                              30972,218732 29812,212468 29638,189094 29464,165720\
                                              30972,218732 29812,212468 29638,189094 29464,165720\
                                              29928,78488 31900,55230 33872,31972 41296,26172\
                                              29928,78488 31900,55230 33872,31972 41296,26172\
                                              49358,24664 57420,23156 82353,23388 94765,23272
                                              49358,24664 57420,23156 82353,23388 94765,23272
I 977 895 0 Builtin Entry | 34452,259216
W 989 880 8194 906 901 BEZIER "Transitions" | 58978,127109 55150,125485 47040,121872 44082,121756\
W 978 895 0 977 951 BEZIER "Transitions" | 38683,259216 44135,257418 54598,254006 60050,252208
                                              41124,121640 36948,124424 36020,132602 35092,140780\
A 979 9 4 TEXT "Actions" | 108416,207754 1 0 0 "processTxByteRdy <= 1'b0;\nUSBWireData <= 2'b00;\nUSBWireCtrl <= `TRI_STATE;\nUSBWireReq <= 1'b0;\nUSBWireWEn <= 1'b0;\ni <= 4'h0;\nTxByte <= 8'h00;\nTxByteCtrl <= 8'h00;\nTXLineState <= 2'b0;\nTXOneCount <= 4'h0;"
                                              35556,170708 38166,179350 40776,187992 50140,192687\
L 980 981 0 TEXT "Labels" | 72434,227674 1 0 0 "TxByte[7:0]"
                                              55128,195007
I 981 0 2 Builtin Signal | 69434,227674 "" ""
C 990 989 0 TEXT "Conditions" | 32613,121194 1 0 0 "i != 4'h8"
L 982 983 0 TEXT "Labels" | 72201,232334 1 0 0 "TxByteCtrl[7:0]"
W 991 880 8195 906 884 BEZIER "Transitions" | 69617,134183 72517,135343 77069,138112 90815,138750\
I 983 0 2 Builtin Signal | 69201,232334 "" ""
                                              104561,139388 153745,139620 168013,138576 182281,137532\
L 984 985 0 TEXT "Labels" | 72201,236994 1 0 0 "TXLineState[1:0]"
                                              190169,133124 192141,121582 194113,110040 194113,68280\
I 985 0 2 Builtin Signal | 69201,236994 "" ""
                                              192025,55114 189937,41948 185529,28723 181353,23271
L 986 987 0 TEXT "Labels" | 72201,241421 1 0 0 "TXOneCount[3:0]"
 
I 987 0 2 Builtin Signal | 69201,241421 "" ""
 
A 999 885 16 TEXT "Actions" | 43433,228332 1 0 0 "i <= 4'h0;"
 
W 998 995 0 996 997 BEZIER "Transitions" | 90591,167640 102761,150317 114231,129084 126401,111760
 
I 997 995 0 Builtin Exit | 129540,111760
 
I 996 995 0 Builtin Entry | 86360,167640
 
H 995 994 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
 
S 994 6 69652 ELLIPSE "Junction" | 45260,135010 3500 3500
 
L 993 994 0 TEXT "State Labels" | 45260,135010 1 0 0 "J1"
 
L 184 185 0 TEXT "Labels" | 192136,264720 1 0 0 "clk"
 
I 185 0 3 Builtin InPort | 186136,264720 "" ""
 
L 186 187 0 TEXT "Labels" | 192243,259666 1 0 0 "rst"
 
I 187 0 2 Builtin InPort | 186243,259666 "" ""
 
C 188 13 0 TEXT "Conditions" | 25531,201445 1 0 0 "rst"
C 188 13 0 TEXT "Conditions" | 25531,201445 1 0 0 "rst"
 
I 187 0 2 Builtin InPort | 186243,259666 "" ""
 
L 186 187 0 TEXT "Labels" | 192243,259666 1 0 0 "rst"
 
I 185 0 3 Builtin InPort | 186136,264720 "" ""
 
L 184 185 0 TEXT "Labels" | 192136,264720 1 0 0 "clk"
 
L 993 994 0 TEXT "State Labels" | 45260,135010 1 0 0 "J1"
 
S 994 6 69652 ELLIPSE "Junction" | 45260,135010 3500 3500
 
H 995 994 0 RECT 0,0,0 0 0 1 255,255,255 0 | 15700,15700 200200,263700
 
I 996 995 0 Builtin Entry | 86360,167640
 
I 997 995 0 Builtin Exit | 129540,111760
 
W 998 995 0 996 997 BEZIER "Transitions" | 90591,167640 102761,150317 114231,129084 126401,111760
 
A 999 885 16 TEXT "Actions" | 43433,228332 1 0 0 "i <= 4'h0;"
L 815 816 0 TEXT "Labels" | 26959,264028 1 0 0 "processTxByteWEn"
L 815 816 0 TEXT "Labels" | 26959,264028 1 0 0 "processTxByteWEn"
END
END

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