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[/] [usbhostslave/] [trunk/] [doc/] [README.txt] - Diff between revs 20 and 22

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USBHostSlave has been successfully compiled using Quartus 4.2
USBHostSlave has been successfully compiled using Quartus 6.0
For some reason I have not been able to use SOPC Builder 4.2 to build the usb SOPC component
Note, that the component Builder in Quartus 6.0 will not accept include files, so you have to use Quartus to generate a
However, SOPC Builder 4.1 generates a usable SOPC component. This may be an error on my part, I need to
single .vqm file, rename this as a .v file, and then import this using component Builder.
investigate further.
 
USBHostSlave has been tested in a SystemC simulation, and on a Altera Nios development kit Cyclone edition.
USBHostSlave has been tested in a SystemC simulation, and on a Altera Nios development kit Cyclone edition.
 
 
 
 
Release notes:
Release notes:
// Version 0.6 - Feb 4th 2005. Fixed bit stuffing and de-stuffing. This version succesfully supports
// Version 0.6 - Feb 4th 2005. Fixed bit stuffing and de-stuffing. This version succesfully supports
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//             the higher level state machines are actively looking for receive packets.
//             the higher level state machines are actively looking for receive packets.
//             Modified USB RX data clock recovery, so that data is sampled during the middle
//             Modified USB RX data clock recovery, so that data is sampled during the middle
//             of a USB bit period. Fixed a bug which could result in double sampling
//             of a USB bit period. Fixed a bug which could result in double sampling
//             of USB RX data if clock phase adjustments were required in the middle of a
//             of USB RX data if clock phase adjustments were required in the middle of a
//             USB packet.
//             USB packet.
 
// Version 1.2 - October 1st 2006. Small changes to .asf FSM's required
 
//             during migration to ActiveHDL 7.1. Released SystemC test bench.
 
//             Re-generated .v files using ActiveHDL 7.1
 
//             Replaced individual timescale directives with `include "timescale.v
 
//             Renamed top level Altera wrapper from 'usbHostSlaveWrap' to
 
//             'usbHostSlaveAvalonWrap'
 
 
 
 
 
 
 
 

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