| Line 3... |
Line 3... |
-- Engineer: Simon Falsig
|
-- Engineer: Simon Falsig
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--
|
--
|
-- Create Date: 19/03/2010
|
-- Create Date: 19/03/2010
|
-- Design Name: uTosNet
|
-- Design Name: uTosNet
|
-- Module Name: uTosNet_usb - Behavioral
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-- Module Name: uTosNet_usb - Behavioral
|
|
-- File Name: uTosNet_uart.vhd
|
-- Project Name: uTosNet
|
-- Project Name: uTosNet
|
-- Target Devices: SDU XC3S50AN Board
|
-- Target Devices: SDU XC3S50AN Board
|
-- Tool versions: Xilinx ISE 11.4
|
-- Tool versions: Xilinx ISE 11.4
|
-- Description: This module implements a very simple ASCII based protocol over
|
-- Description: This module implements a very simple ASCII based protocol over
|
-- a uart. Data can be read and written from and to one port of a
|
-- a uart. Data can be read and written from and to one port of a
|
| Line 36... |
Line 37... |
-- uart implementation though.
|
-- uart implementation though.
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--
|
--
|
-- Revision:
|
-- Revision:
|
-- Revision 0.10 - Initial release
|
-- Revision 0.10 - Initial release
|
--
|
--
|
|
-- Copyright 2010
|
|
--
|
|
-- This module is free software: you can redistribute it and/or modify
|
|
-- it under the terms of the GNU Lesser General Public License as published by
|
|
-- the Free Software Foundation, either version 3 of the License, or
|
|
-- (at your option) any later version.
|
|
--
|
|
-- This module is distributed in the hope that it will be useful,
|
|
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
-- GNU Lesser General Public License for more details.
|
|
--
|
|
-- You should have received a copy of the GNU Lesser General Public License
|
|
-- along with this module. If not, see <http://www.gnu.org/licenses/>.
|
----------------------------------------------------------------------------------
|
----------------------------------------------------------------------------------
|
|
|
library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_1164.ALL;
|
use IEEE.STD_LOGIC_ARITH.ALL;
|
use IEEE.STD_LOGIC_ARITH.ALL;
|
use IEEE.STD_LOGIC_UNSIGNED.ALL;
|
use IEEE.STD_LOGIC_UNSIGNED.ALL;
|
|
|
