URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [clk_and_reset.v] - Diff between revs 17 and 18

Rev 17	Rev 18
Line 88...	Line 88...
`// output active high global reset sync with two DFFs`	`// output active high global reset sync with two DFFs`
`timescale 1 ns/100 ps	`timescale 1 ns/100 ps
`module vl_sync_rst ( rst_n_i, rst_o, clk);`	`module vl_sync_rst ( rst_n_i, rst_o, clk);`
`input rst_n_i, clk;`	`input rst_n_i, clk;`
`output rst_o;`	`output rst_o;`
`reg [0:1] tmp;`	`reg [1:0] tmp;`
`always @ (posedge clk or negedge rst_n_i)`	`always @ (posedge clk or negedge rst_n_i)`
`if (!rst_n_i)`	`if (!rst_n_i)`
`tmp <= 2'b11;`	`tmp <= 2'b11;`
`else`	`else`
`tmp <= {1'b0,tmp[0]};`	`tmp <= {1'b0,tmp[0]};`