URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [registers.v] - Diff between revs 41 and 48

Rev 41	Rev 48
Line 381...	Line 381...
`ifdef LATCH	`ifdef LATCH
`define MODULE latch	`define MODULE latch
module `BASE`MODULE ( d, le, q, clk);	module `BASE`MODULE ( d, le, q, clk);
`undef MODULE	`undef MODULE
`input d, le;`	`input d, le;`
`output q;`	`input clk;`
`input clk;/*`	`always @ (le or d)`
`always @ (posedge direction_set or posedge direction_clr)`	`if le`
`if (direction_clr)`	`d <= q;`
`direction <= going_empty;`
`else`
`direction <= going_full;*/`
`endmodule`	`endmodule`
`endif	`endif

`endif	`endif