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endmodule
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endmodule
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module dff_ce_clear ( d, ce, clear, q, clk, rst);
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module dff_ce_clear ( d, ce, clear, q, clk, rst);
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parameter width = 1;
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parameter width = 1;
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parameter reset_value = 0;
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parameter reset_value = 0;
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input [width-1:0] d;
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input [width-1:0] d;
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input ce, clk, rst;
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input ce, clear, clk, rst;
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output reg [width-1:0] q;
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output reg [width-1:0] q;
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always @ (posedge clk or posedge rst)
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always @ (posedge clk or posedge rst)
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if (rst)
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if (rst)
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q <= reset_value;
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q <= reset_value;
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else
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else
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