URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library_actel.v] - Diff between revs 63 and 64

Rev 63	Rev 64
Line 286...	Line 286...
`q <= {width{1'b1}};`	`q <= {width{1'b1}};`
`else`	`else`
`q <= d;`	`q <= d;`
`endmodule`	`endmodule`
`module vl_spr ( sp, r, q, clk, rst);`	`module vl_spr ( sp, r, q, clk, rst);`
`parameter width = 1;`	`//parameter width = 1;`
`parameter reset_value = 0;`	`parameter reset_value = 1'b0;`
`input sp, r;`	`input sp, r;`
`output reg q;`	`output reg q;`
`input clk, rst;`	`input clk, rst;`
`always @ (posedge clk or posedge rst)`	`always @ (posedge clk or posedge rst)`
`if (rst)`	`if (rst)`