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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [wb.v] - Diff between revs 122 and 123

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Rev 122 Rev 123
Line 1613... Line 1613... 
        (wb_dat_width==avalon_dat_width*32) ? wb_adr_width+5 :
 
        (wb_dat_width==avalon_dat_width*32) ? wb_adr_width+5 :
 
        (wb_dat_width==avalon_dat_width/2) ? wb_adr_width-1 :
 
        (wb_dat_width==avalon_dat_width/2) ? wb_adr_width-1 :
 
        (wb_dat_width==avalon_dat_width/4) ? wb_adr_width-2 :
 
        (wb_dat_width==avalon_dat_width/4) ? wb_adr_width-2 :
 
        (wb_dat_width==avalon_dat_width/8) ? wb_adr_width-3 :
 
        (wb_dat_width==avalon_dat_width/8) ? wb_adr_width-3 :
 
        (wb_dat_width==avalon_dat_width/16) ? wb_adr_width-4 :
 
        (wb_dat_width==avalon_dat_width/16) ? wb_adr_width-4 :
 
        (wb_dat_width==avalon_dat_width/32) ? wb_adr_width-5;
 
        (wb_dat_width==avalon_dat_width/32) ? wb_adr_width-5 : 0;
 
parameter avalon_burst_size = 4;
 
parameter avalon_burst_size = 4;
 
// cache
 
// cache
 
parameter async = 1;
 
parameter async = 1;
 
parameter nr_of_ways = 1;
 
parameter nr_of_ways = 1;
 
parameter aw_offset = 4;
 
parameter aw_offset = 4;

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