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.b_rst(wbm_rst)
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.b_rst(wbm_rst)
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);
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);
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endmodule
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endmodule
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// WB ROM
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module wb_boot_rom (
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wb_adr_i, wb_stb_i, wb_cyc_i,
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wb_dat_o, wb_ack_o, wb_clk, wb_rst);
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//E2_ifndef BOOT_ROM
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//E2_define BOOT_ROM "boot_rom.v"
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//E2_endif
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parameter addr_width = 5;
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input [(addr_width+2)-1:2] wb_adr_i;
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input wb_stb_i;
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input wb_cyc_i;
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output reg [31:0] wb_dat_o;
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output reg wb_ack_o;
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input wb_clk;
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input wb_rst;
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always @ (posedge wb_clk or posedge wb_rst)
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if (wb_rst)
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wb_dat_o <= 32'h15000000;
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else
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case (wb_adr_i)
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//E2_include `BOOT_ROM
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/*
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// Zero r0 and jump to 0x00000100
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0 : wb_dat_o <= 32'h18000000;
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1 : wb_dat_o <= 32'hA8200000;
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2 : wb_dat_o <= 32'hA8C00100;
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3 : wb_dat_o <= 32'h44003000;
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4 : wb_dat_o <= 32'h15000000;
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*/
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default:
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wb_dat_o <= 32'h00000000;
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endcase // case (wb_adr_i)
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always @ (posedge wb_clk or posedge wb_rst)
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if (wb_rst)
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wb_ack_o <= 1'b0;
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else
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wb_ack_o <= wb_stb_i & wb_cyc_i & !wb_ack_o;
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endmodule
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