| Line 28... |
Line 28... |
|
|
// {adr_o,bte_o,cti_o,dat_o,sel_o,we_o,cyc_o,stb_o}
|
// {adr_o,bte_o,cti_o,dat_o,sel_o,we_o,cyc_o,stb_o}
|
parameter [32+2+3+32+4+1+1+1:1] inst_rom [0:instructions-1]= {
|
parameter [32+2+3+32+4+1+1+1:1] inst_rom [0:instructions-1]= {
|
{32'h0,linear,classic,32'h0,4'b1111,1'b0,1'b0,1'b0},
|
{32'h0,linear,classic,32'h0,4'b1111,1'b0,1'b0,1'b0},
|
|
|
{32'h100,linear,classic,32'h12345678,4'b1111,1'b1,1'b1,1'b1},
|
{32'h100,linear,classic,32'h12345678,4'b1111,1'b1,1'b1,1'b1}, // write 0x12345678 @ 0x100
|
{32'h100,linear,classic,32'h0,4'b1111,1'b0,1'b1,1'b1},
|
{32'h100,linear,classic,32'h0,4'b1111,1'b0,1'b1,1'b1}, // read @ 0x100
|
|
|
{32'h0,linear,classic,32'h0,4'b1111,1'b0,1'b0,1'b0},
|
{32'h0,linear,classic,32'h0,4'b1111,1'b0,1'b0,1'b0},
|
|
|
{32'hA000,beat4,inc,32'h00010002,4'b1111,1'b1,1'b1,1'b1}, // write burst
|
{32'hA000,beat4,inc,32'h00010002,4'b1111,1'b1,1'b1,1'b1}, // write burst
|
{32'hA004,beat4,inc,32'h00030004,4'b1111,1'b1,1'b1,1'b1},
|
{32'hA004,beat4,inc,32'h00030004,4'b1111,1'b1,1'b1,1'b1},
|
| Line 124... |
Line 124... |
if (reset)
|
if (reset)
|
OK <= 1'b1;
|
OK <= 1'b1;
|
else
|
else
|
if (ack_i & !we_o & (dat_i != dat[i])) begin
|
if (ack_i & !we_o & (dat_i != dat[i])) begin
|
OK <= 1'b0;
|
OK <= 1'b0;
|
$display ("wrong read value %h at %t", dat_i, $time);
|
$display ("wrong read value %h @ %h at %t", dat_i, adr_o, $time);
|
end
|
end else if (ack_i & !we_o & (dat_i == dat[i]))
|
|
$display ("read value %h @ %h at %t", dat_i, adr_o, $time);
|
|
else if (ack_i)
|
|
$display ("write value %h %b @ %h at %t", dat_o, sel_o, adr_o, $time);
|
|
|
// always @ (posedge clk or posedge reset)
|
// always @ (posedge clk or posedge reset)
|
// if (reset)
|
// if (reset)
|
// state <= idle;
|
// state <= idle;
|
// else
|
// else
|
