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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// WISHBONE rev.B2 compliant VGA/LCD Core; Defines file ////
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//// WISHBONE rev.B2 compliant enhanced VGA/LCD Core ////
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//// ////
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//// Defines file ////
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//// ////
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//// ////
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//// Author: Richard Herveille ////
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//// Author: Richard Herveille ////
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//// richard@asics.ws ////
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//// richard@asics.ws ////
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//// www.asics.ws ////
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//// www.asics.ws ////
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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org/projects/vga_lcd ////
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//// Downloaded from: http://www.opencores.org/projects/vga_lcd ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2001 Richard Herveille ////
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//// Copyright (C) 2001, 2002 Richard Herveille ////
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//// richard@asics.ws ////
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//// richard@asics.ws ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: vga_defines.v,v 1.3 2002-01-28 03:47:16 rherveille Exp $
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// $Id: vga_defines.v,v 1.4 2002-02-07 05:42:10 rherveille Exp $
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//
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//
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// $Date: 2002-01-28 03:47:16 $
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// $Date: 2002-02-07 05:42:10 $
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// $Revision: 1.3 $
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// $Revision: 1.4 $
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// $Author: rherveille $
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// $Author: rherveille $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// define memory vendor
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// define memory vendor
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//
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//
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`define VENDOR_FPGA
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`define VENDOR_FPGA
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//
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// enable / disable hardware cursors
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//
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//`define VGA_HWC0
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//`define VGA_HWC1
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No newline at end of file
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No newline at end of file
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