OpenCores
URL https://opencores.org/ocsvn/vhdl_cpu_emulator/vhdl_cpu_emulator/trunk

Subversion Repositories vhdl_cpu_emulator

[/] [vhdl_cpu_emulator/] [trunk/] [access_2us.txt] - Diff between revs 2 and 3

Show entire file | Details | Blame | View Log

Rev 2 Rev 3
?rev1line?
?rev2line?
 
PARAMETERS vector8 index
 
vector8 addr = 00000000
 
if index == 00000000
 
   wait 5 us
 
   addr = 00000000
 
if_else
 
   wait 6 us
 
   addr = 00000001
 
if_end
 
vector8 var = 00000000
 
vector8 inc = 00000001
 
wait 5 us
 
while
 
        read addr var
 
        addr += inc
 
        wait 2 us
 
while_end

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.