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https://opencores.org/ocsvn/vhdl_wb_tb/vhdl_wb_tb/trunk
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---- ----
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---- ----
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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---- SVN information
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---- SVN information
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----
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----
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---- $URL: file:///svn/vhdl_wb_tb/vhdl_wb_tb/trunk/rtl/vhdl/packages/wishbone_pkg.vhd $
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---- $URL: file:///svn/vhdl_wb_tb/vhdl_wb_tb/trunk/rtl/vhdl/packages/wishbone_pkg.vhd $
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---- $Revision: 22 $
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---- $Revision: 25 $
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---- $Date: 2018-08-01 12:06:31 +0200 (Wed, 01 Aug 2018) $
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---- $Date: 2018-08-03 13:05:57 +0200 (Fri, 03 Aug 2018) $
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---- $Author: sinx $
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---- $Author: sinx $
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---- $Id: wishbone_pkg.vhd 22 2018-08-01 10:06:31Z sinx $
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---- $Id: wishbone_pkg.vhd 25 2018-08-03 11:05:57Z sinx $
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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---- ----
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---- ----
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---- Copyright (C) 2018 Authors and OPENCORES.ORG ----
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---- Copyright (C) 2018 Authors and OPENCORES.ORG ----
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---- ----
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---- ----
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---- This source file may be used and distributed without ----
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---- This source file may be used and distributed without ----
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constant wb_master_out_idle_c : wishbone_master_out_t := (
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constant wb_master_out_idle_c : wishbone_master_out_t := (
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clk => '0',
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clk => '0',
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dat => wishbone_data_of_unused_address_c,
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dat => wishbone_data_of_unused_address_c,
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rst => '0',
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rst => '0',
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tgd => (others=>'0'),
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tgd => (others=>'0'),
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adr => (others=>'U'),
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adr => wishbone_unused_address_c, -- do not use 'X','U','Z','H','L', since this will generate warnings in address decoders where to_integer() is used
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cyc => '0',
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cyc => '0',
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lock => '0',
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lock => '0',
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sel => (others=>'0'),
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sel => (others=>'0'),
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stb => '0',
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stb => '0',
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tga => (others=>'0'),
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tga => (others=>'0'),
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