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# $Id: w11a_tb_guide.txt 443 2011-12-23 11:21:03Z mueller $
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# $Id: w11a_tb_guide.txt 504 2013-04-13 15:37:24Z mueller $
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Guide to running w11a test benches
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Guide to running w11a test benches
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Table of content:
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Table of content:
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The rlink backend process can connect either via a named pipe to a ghdl
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The rlink backend process can connect either via a named pipe to a ghdl
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simulation, or via a serial port to a FPGA board. This way the same tests
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simulation, or via a serial port to a FPGA board. This way the same tests
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can be executed in simulation and on real hardware.
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can be executed in simulation and on real hardware.
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Currently two backend implementations are available:
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- pi_rri: written in perl (old, slow, but full functionality)
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- ti_tti: written in C++ and Tcl (new, fast, but as of V0.55 only with
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limited functionality; will replace pi_rri).
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4. Available system tests benches -----------------------------------------
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4. Available system tests benches -----------------------------------------
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4a. serport tester -- --------------------------------------------
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4a. serport tester -- --------------------------------------------
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The sys_tst_serloop design is a test target for validating the serial
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The sys_tst_serloop design is a test target for validating the serial
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cd $RETROBASE/rtl/sys_gen/tst_rlink/s3board/tb
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cd $RETROBASE/rtl/sys_gen/tst_rlink/s3board/tb
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make tb_tst_rlink_s3
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make tb_tst_rlink_s3
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time ti_rri --run="tbw tb_tst_rlink_s3" --fifo --logl=3 -- \
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time ti_rri --run="tbw tb_tst_rlink_s3" --fifo --logl=3 -- \
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"package require tst_rlink" "tst_rlink::setup" "tst_rlink::test_all" |\
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"package require tst_rlink" "tst_rlink::setup" "tst_rlink::test_all" |\
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tee tb_tst_rlink_s3_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_tst_rlink_s3_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 1822195.0 ns 91100: DONE
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-> 960540.0 ns 48017: DONE
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-> real 0m13.281s
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-> real 0m4.470s
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- sys_tst_rlink_n2 test bench
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- sys_tst_rlink_n2 test bench
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cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys2/tb
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cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys2/tb
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make tb_tst_rlink_n2
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make tb_tst_rlink_n2
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time ti_rri --run="tbw tb_tst_rlink_n2" --fifo --logl=3 -- \
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time ti_rri --run="tbw tb_tst_rlink_n2" --fifo --logl=3 -- \
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"package require tst_rlink" "tst_rlink::setup" "tst_rlink::test_all" |\
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"package require tst_rlink" "tst_rlink::setup" "tst_rlink::test_all" |\
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tee tb_tst_rlink_n2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_tst_rlink_n2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 1769140.0 ns 88446: DONE
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-> 960560.0 ns 48017: DONE
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-> real 0m15.289s
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-> real 0m4.717s
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- sys_tst_rlink_n3 test bench
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- sys_tst_rlink_n3 test bench
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cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys3/tb
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cd $RETROBASE/rtl/sys_gen/tst_rlink/nexys3/tb
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make tb_tst_rlink_n3
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make tb_tst_rlink_n3
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time ti_rri --run="tbw tb_tst_rlink_n3" --fifo --logl=3 -- \
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time ti_rri --run="tbw tb_tst_rlink_n3" --fifo --logl=3 -- \
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"package require tst_rlink" "tst_rlink::setup" "tst_rlink::test_all" |\
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"package require tst_rlink" "tst_rlink::setup" "tst_rlink::test_all" |\
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tee tb_tst_rlink_n3_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_tst_rlink_n3_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 893590.0 ns 89338: DONE
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-> 480380.0 ns 48017: DONE
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-> real 0m9.510s
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-> real 0m4.860s
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4c. w11a systems -----------------------------------------------------
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4c. w11a systems -----------------------------------------------------
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The stimulus file used in the w11a core test can be executed in the
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The stimulus file used in the w11a core test can be executed in the
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full system context (both s3board and nexys2 versions) with the
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full system context (both s3board and nexys2 versions) with the
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- sys_w11a_s3 test bench
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- sys_w11a_s3 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/s3board/tb
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cd $RETROBASE/rtl/sys_gen/w11a/s3board/tb
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make tb_w11a_s3
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make tb_w11a_s3
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time pi_rri --fifo --timeout=40. --cmax=3 \
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time ti_rri --pack=rw11a --run="tbw tb_w11a_s3" --fifo --logl=3 -- \
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--run="tbw tb_w11a_s3" -- \
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"rw11a::setup_cpu" \
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@../../../../w11a/tb/tb_pdp11core_stim.dat |\
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"rw11a::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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tee tb_w11a_s3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_w11a_s3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 7852095.0 ns 392595: DONE
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-> 10225140.0 ns 511247: DONE
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-> real 0m49.835s user 0m50.203s sys 0m00.696s
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-> real 0m52.105s user 0m0.260s sys 0m0.132s
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- sys_w11a_n2 test bench
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- sys_w11a_n2 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb
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make tb_w11a_n2
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make tb_w11a_n2
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time pi_rri --fifo --timeout=40. --cmax=3 \
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time ti_rri --pack=rw11a --run="tbw tb_w11a_n2" --fifo --logl=3 -- \
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--run="tbw tb_w11a_n2" -- \
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"rw11a::setup_cpu" \
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@../../../../w11a/tb/tb_pdp11core_stim.dat |\
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"rw11a::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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tee tb_w11a_n2_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_w11a_n2_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 7836580.0 ns 391818: DONE
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-> 10278380.0 ns 513908: DONE
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-> real 1m0.854s user 1m1.332s sys 0m0.800s
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-> real 1m26.388s user 0m0.312s sys 0m0.156s
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- sys_w11a_n3 test bench
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- sys_w11a_n3 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/nexys3/tb
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cd $RETROBASE/rtl/sys_gen/w11a/nexys3/tb
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make tb_w11a_n3
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make tb_w11a_n3
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time pi_rri --fifo --timeout=40. --cmax=3 \
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time ti_rri --pack=rw11a --run="tbw tb_w11a_n3" --fifo --logl=3 -- \
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--run="tbw tb_w11a_n3" -- \
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"rw11a::setup_cpu" \
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@../../../../w11a/tb/tb_pdp11core_stim.dat |\
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"rw11a::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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tee tb_w11a_n3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_w11a_n3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 3956540.0 ns 395633: DONE
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-> 5167410.0 ns 516720: DONE
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-> real 1m13.811s user 1m14.389s sys 0m0.948s
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-> real 1m26.611s user 0m0.248s sys 0m0.196s
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A new, modular w11a test bench is under construction. So far it is very
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incomplete. This very preliminary version can be executed with
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- sys_w11a_n2 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb
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make tb_w11a_n2
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time ti_rri --pack=rw11a --run="tbw tb_w11a_n2" --fifo --logl=3 -- \
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"rw11a::setup_cpu" "rw11a::tbench @w11a_all.dat" | \
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tee w11a_tbench_dsim.log | egrep "(-[EFW]:|FAIL|PASS|DONE)"
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-> 904180.0 ns 45198: DONE
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-> real 0m5.739s user 0m0.576s sys 0m0.076s
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