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# $Id: w11a_tb_guide.txt 504 2013-04-13 15:37:24Z mueller $
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# $Id: w11a_tb_guide.txt 511 2013-04-27 13:51:46Z mueller $
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Guide to running w11a test benches
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Guide to running w11a test benches
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Table of content:
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Table of content:
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simulation, or via a serial port to a FPGA board. This way the same tests
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simulation, or via a serial port to a FPGA board. This way the same tests
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can be executed in simulation and on real hardware.
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can be executed in simulation and on real hardware.
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4. Available system tests benches -----------------------------------------
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4. Available system tests benches -----------------------------------------
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4a. serport tester -- --------------------------------------------
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4a. serport tester ---------------------------------------------------
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The sys_tst_serloop design is a test target for validating the serial
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The sys_tst_serloop design is a test target for validating the serial
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link UART stack. Send and receive throughput as well as loop-back tests
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link UART stack. Send and receive throughput as well as loop-back tests
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are supported
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are supported
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- sys_w11a_s3 test bench
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- sys_w11a_s3 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/s3board/tb
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cd $RETROBASE/rtl/sys_gen/w11a/s3board/tb
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make tb_w11a_s3
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make tb_w11a_s3
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time ti_rri --pack=rw11a --run="tbw tb_w11a_s3" --fifo --logl=3 -- \
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time ti_rri --pack=rw11 --run="tbw tb_w11a_s3" --fifo --logl=3 -- \
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"rw11a::setup_cpu" \
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"rw11::setup_cpu" \
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"rw11a::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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"rw11::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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tee tb_w11a_s3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_w11a_s3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 10225140.0 ns 511247: DONE
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-> 10225140.0 ns 511247: DONE
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-> real 0m52.105s user 0m0.260s sys 0m0.132s
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-> real 0m52.105s user 0m0.260s sys 0m0.132s
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- sys_w11a_n2 test bench
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- sys_w11a_n2 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb
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make tb_w11a_n2
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make tb_w11a_n2
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time ti_rri --pack=rw11a --run="tbw tb_w11a_n2" --fifo --logl=3 -- \
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time ti_rri --pack=rw11 --run="tbw tb_w11a_n2" --fifo --logl=3 -- \
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"rw11a::setup_cpu" \
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"rw11::setup_cpu" \
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"rw11a::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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"rw11::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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tee tb_w11a_n2_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_w11a_n2_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 10278380.0 ns 513908: DONE
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-> 10278380.0 ns 513908: DONE
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-> real 1m26.388s user 0m0.312s sys 0m0.156s
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-> real 1m26.388s user 0m0.312s sys 0m0.156s
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- sys_w11a_n3 test bench
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- sys_w11a_n3 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/nexys3/tb
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cd $RETROBASE/rtl/sys_gen/w11a/nexys3/tb
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make tb_w11a_n3
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make tb_w11a_n3
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time ti_rri --pack=rw11a --run="tbw tb_w11a_n3" --fifo --logl=3 -- \
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time ti_rri --pack=rw11 --run="tbw tb_w11a_n3" --fifo --logl=3 -- \
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"rw11a::setup_cpu" \
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"rw11::setup_cpu" \
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"rw11a::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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"rw11::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
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tee tb_w11a_n3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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tee tb_w11a_n3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
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-> 5167410.0 ns 516720: DONE
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-> 5167410.0 ns 516720: DONE
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-> real 1m26.611s user 0m0.248s sys 0m0.196s
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-> real 1m26.611s user 0m0.248s sys 0m0.196s
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A new, modular w11a test bench is under construction. So far it is very
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A new, modular w11a test bench is under construction. So far it is very
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- sys_w11a_n2 test bench
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- sys_w11a_n2 test bench
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb
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cd $RETROBASE/rtl/sys_gen/w11a/nexys2/tb
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make tb_w11a_n2
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make tb_w11a_n2
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time ti_rri --pack=rw11a --run="tbw tb_w11a_n2" --fifo --logl=3 -- \
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time ti_rri --pack=rw11 --run="tbw tb_w11a_n2" --fifo --logl=3 -- \
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"rw11a::setup_cpu" "rw11a::tbench @w11a_all.dat" | \
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"rw11::setup_cpu" "rw11::tbench @w11a_all.dat" | \
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tee w11a_tbench_dsim.log | egrep "(-[EFW]:|FAIL|PASS|DONE)"
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tee w11a_tbench_dsim.log | egrep "(-[EFW]:|FAIL|PASS|DONE)"
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-> 904180.0 ns 45198: DONE
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-> 904180.0 ns 45198: DONE
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-> real 0m5.739s user 0m0.576s sys 0m0.076s
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-> real 0m5.739s user 0m0.576s sys 0m0.076s
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