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[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [ibus/] [iblib.vhd] - Diff between revs 8 and 9

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-- $Id: iblib.vhd 335 2010-10-24 22:24:23Z mueller $
-- $Id: iblib.vhd 346 2010-12-22 22:59:26Z mueller $
--
--
-- Copyright 2008-2010 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2008-2010 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
--
-- This program is free software; you may redistribute and/or modify it under
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- the terms of the GNU General Public License as published by the Free
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    IB_SRES_IN : in ib_sres_vector(1 to WIDTH); -- ib_sres input array
    IB_SRES_IN : in ib_sres_vector(1 to WIDTH); -- ib_sres input array
    IB_SRES_OR : out ib_sres_type               -- ib_sres or'ed output
    IB_SRES_OR : out ib_sres_type               -- ib_sres or'ed output
  );
  );
end component;
end component;
 
 
component ib_sres_or_mon is             -- ibus result or monitor
 
  port (
 
    IB_SRES_1 :  in ib_sres_type;                 -- ib_sres input 1
 
    IB_SRES_2 :  in ib_sres_type := ib_sres_init; -- ib_sres input 2
 
    IB_SRES_3 :  in ib_sres_type := ib_sres_init; -- ib_sres input 3
 
    IB_SRES_4 :  in ib_sres_type := ib_sres_init  -- ib_sres input 4
 
  );
 
end component;
 
 
 
type intmap_type is record              -- interrupt map entry type
type intmap_type is record              -- interrupt map entry type
  vec : integer;                        -- vector address
  vec : integer;                        -- vector address
  pri : integer;                        -- priority
  pri : integer;                        -- priority
end record intmap_type;
end record intmap_type;
constant intmap_init : intmap_type := (0,0);
constant intmap_init : intmap_type := (0,0);
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    EI_PRI : out slv3;                  -- interrupt priority
    EI_PRI : out slv3;                  -- interrupt priority
    EI_VECT : out slv9_2                -- interrupt vector
    EI_VECT : out slv9_2                -- interrupt vector
  );
  );
end component;
end component;
 
 
 
--
 
-- components for use in test benches (not synthesizable)
 
--
 
 
 
component ib_sres_or_mon is             -- ibus result or monitor
 
  port (
 
    IB_SRES_1 :  in ib_sres_type;                 -- ib_sres input 1
 
    IB_SRES_2 :  in ib_sres_type := ib_sres_init; -- ib_sres input 2
 
    IB_SRES_3 :  in ib_sres_type := ib_sres_init; -- ib_sres input 3
 
    IB_SRES_4 :  in ib_sres_type := ib_sres_init  -- ib_sres input 4
 
  );
 
end component;
 
 
end package iblib;
end package iblib;
 
 
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