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-- $Id: rlinklib.vhd 442 2011-12-23 10:03:28Z mueller $
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-- $Id: rlinklib.vhd 466 2012-12-30 13:26:55Z mueller $
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--
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--
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-- Copyright 2007-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2007-2012 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- Package Name: rlinklib
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-- Package Name: rlinklib
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-- Description: Definitions for rlink interface and bus entities
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-- Description: Definitions for rlink interface and bus entities
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--
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--
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-- Dependencies: -
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-- Dependencies: -
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-- Tool versions: xst 8.2, 9.1, 9.2, 11.4, 12.1, 13.1; ghdl 0.18-0.29
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-- Tool versions: xst 8.2, 9.1, 9.2, 11.4, 12.1, 13.3; ghdl 0.18-0.29
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2012-12-29 466 3.3.1 add rlink_rlbmux
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-- 2011-12-23 444 3.3 CLK_CYCLE now integer
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-- 2011-12-21 442 3.2.1 retire old, deprecated interfaces
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-- 2011-12-21 442 3.2.1 retire old, deprecated interfaces
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-- 2011-12-09 437 3.2 add rlink_core8
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-- 2011-12-09 437 3.2 add rlink_core8
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-- 2011-11-18 427 3.1.3 now numeric_std clean
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-- 2011-11-18 427 3.1.3 now numeric_std clean
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-- 2010-12-25 348 3.1.2 drop RL_FLUSH support, add RL_MONI for rlink_core;
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-- 2010-12-25 348 3.1.2 drop RL_FLUSH support, add RL_MONI for rlink_core;
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-- new rlink_serport interface;
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-- new rlink_serport interface;
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RB_LAM : in slv16; -- rbus: look at me
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RB_LAM : in slv16; -- rbus: look at me
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RB_STAT : in slv3 -- rbus: status flags
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RB_STAT : in slv3 -- rbus: status flags
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);
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);
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end component;
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end component;
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component rlink_rlbmux is -- rlink rlb multiplexer
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port (
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SEL : in slbit; -- port select (0:RLB<->P0; 1:RLB<->P1)
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RLB_DI : out slv8; -- rlb: data in
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RLB_ENA : out slbit; -- rlb: data enable
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RLB_BUSY : in slbit; -- rlb: data busy
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RLB_DO : in slv8; -- rlb: data out
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RLB_VAL : in slbit; -- rlb: data valid
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RLB_HOLD : out slbit; -- rlb: data hold
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P0_RXDATA : in slv8; -- p0: rx data
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P0_RXVAL : in slbit; -- p0: rx valid
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P0_RXHOLD : out slbit; -- p0: rx hold
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P0_TXDATA : out slv8; -- p0: tx data
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P0_TXENA : out slbit; -- p0: tx enable
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P0_TXBUSY : in slbit; -- p0: tx busy
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P1_RXDATA : in slv8; -- p1: rx data
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P1_RXVAL : in slbit; -- p1: rx valid
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P1_RXHOLD : out slbit; -- p1: rx hold
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P1_TXDATA : out slv8; -- p1: tx data
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P1_TXENA : out slbit; -- p1: tx enable
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P1_TXBUSY : in slbit -- p1: tx busy
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);
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end component;
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--
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--
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-- core + concrete_interface combo's
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-- core + concrete_interface combo's
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--
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--
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component rlink_sp1c is -- rlink_core8+serport_1clock combo
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component rlink_sp1c is -- rlink_core8+serport_1clock combo
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component rlink_mon is -- rlink monitor
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component rlink_mon is -- rlink monitor
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generic (
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generic (
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DWIDTH : positive := 9); -- data port width (8 or 9)
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DWIDTH : positive := 9); -- data port width (8 or 9)
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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CLK_CYCLE : in slv31 := (others=>'0'); -- clock cycle number
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CLK_CYCLE : in integer := 0; -- clock cycle number
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ENA : in slbit := '1'; -- enable monitor output
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ENA : in slbit := '1'; -- enable monitor output
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RL_DI : in slv(DWIDTH-1 downto 0); -- rlink: data in
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RL_DI : in slv(DWIDTH-1 downto 0); -- rlink: data in
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RL_ENA : in slbit; -- rlink: data enable
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RL_ENA : in slbit; -- rlink: data enable
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RL_BUSY : in slbit; -- rlink: data busy
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RL_BUSY : in slbit; -- rlink: data busy
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RL_DO : in slv(DWIDTH-1 downto 0); -- rlink: data out
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RL_DO : in slv(DWIDTH-1 downto 0); -- rlink: data out
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