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-- $Id: pdp11_mmu_ssr12.vhd 314 2010-07-09 17:38:41Z mueller $
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-- $Id: pdp11_mmu_ssr12.vhd 335 2010-10-24 22:24:23Z mueller $
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--
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--
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-- Copyright 2006-2009 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2006-2010 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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--
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--
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- Module Name: pdp11_mmu_ssr12 - syn
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-- Module Name: pdp11_mmu_ssr12 - syn
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-- Description: pdp11: mmu register ssr1 and ssr2
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-- Description: pdp11: mmu register ssr1 and ssr2
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--
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--
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-- Dependencies: -
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-- Dependencies: ib_sel
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2, 12.1; ghdl 0.18-0.29
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-- Revision History:
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2010-10-23 335 1.2.1 use ib_sel
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-- 2010-10-17 333 1.2 use ibus V2 interface
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-- 2009-05-30 220 1.1.4 final removal of snoopers (were already commented)
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-- 2009-05-30 220 1.1.4 final removal of snoopers (were already commented)
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-- 2008-08-22 161 1.1.3 rename ubf_ -> ibf_; use iblib
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-- 2008-08-22 161 1.1.3 rename ubf_ -> ibf_; use iblib
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-- 2008-03-02 121 1.1.2 remove snoopers
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-- 2008-03-02 121 1.1.2 remove snoopers
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-- 2008-01-05 110 1.1.1 rename IB_MREQ(ena->req) SRES(sel->ack, hold->busy)
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-- 2008-01-05 110 1.1.1 rename IB_MREQ(ena->req) SRES(sel->ack, hold->busy)
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-- 2007-12-30 107 1.1 use IB_MREQ/IB_SRES interface now
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-- 2007-12-30 107 1.1 use IB_MREQ/IB_SRES interface now
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signal IBSEL_SSR1 : slbit := '0';
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signal IBSEL_SSR1 : slbit := '0';
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signal IBSEL_SSR2 : slbit := '0';
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signal IBSEL_SSR2 : slbit := '0';
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signal R_SSR1 : mmu_ssr1_type := mmu_ssr1_init;
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signal R_SSR1 : mmu_ssr1_type := mmu_ssr1_init;
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signal R_SSR2 : slv16 := (others=>'0');
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signal R_SSR2 : slv16 := (others=>'0');
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signal NEXT_SSR1 : mmu_ssr1_type := mmu_ssr1_init;
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signal N_SSR1 : mmu_ssr1_type := mmu_ssr1_init;
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signal NEXT_SSR2 : slv16 := (others=>'0');
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signal N_SSR2 : slv16 := (others=>'0');
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begin
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begin
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proc_ibsel: process (IB_MREQ)
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SEL_SSR1 : ib_sel
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variable issr1 : slbit := '0';
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generic map (
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variable issr2 : slbit := '0';
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IB_ADDR => ibaddr_ssr1)
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begin
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port map (
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issr1 := '0';
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CLK => CLK,
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issr2 := '0';
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IB_MREQ => IB_MREQ,
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if IB_MREQ.req = '1' then
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SEL => IBSEL_SSR1
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if IB_MREQ.addr = ibaddr_ssr1(12 downto 1) then issr1 := '1'; end if;
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);
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if IB_MREQ.addr = ibaddr_ssr2(12 downto 1) then issr2 := '1'; end if;
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SEL_SSR2 : ib_sel
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end if;
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generic map (
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IBSEL_SSR1 <= issr1;
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IB_ADDR => ibaddr_ssr2)
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IBSEL_SSR2 <= issr2;
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port map (
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IB_SRES.ack <= issr1 or issr2;
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CLK => CLK,
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IB_SRES.busy <= '0';
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IB_MREQ => IB_MREQ,
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end process proc_ibsel;
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SEL => IBSEL_SSR2
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);
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proc_ubdout : process (IBSEL_SSR1, IBSEL_SSR2, R_SSR1, R_SSR2)
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proc_ibres : process (IBSEL_SSR1, IBSEL_SSR2, IB_MREQ, R_SSR1, R_SSR2)
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variable ssr1out : slv16 := (others=>'0');
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variable ssr1out : slv16 := (others=>'0');
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variable ssr2out : slv16 := (others=>'0');
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variable ssr2out : slv16 := (others=>'0');
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begin
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begin
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ssr1out := (others=>'0');
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ssr1out := (others=>'0');
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if IBSEL_SSR2 = '1' then
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if IBSEL_SSR2 = '1' then
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ssr2out := R_SSR2;
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ssr2out := R_SSR2;
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end if;
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end if;
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IB_SRES.dout <= ssr1out or ssr2out;
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IB_SRES.dout <= ssr1out or ssr2out;
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IB_SRES.ack <= (IBSEL_SSR1 or IBSEL_SSR2) and
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(IB_MREQ.re or IB_MREQ.we); -- ack all
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IB_SRES.busy <= '0';
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end process proc_ubdout;
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end process proc_ibres;
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proc_regs : process (CLK)
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proc_regs : process (CLK)
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begin
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begin
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if CLK'event and CLK='1' then
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if CLK'event and CLK='1' then
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R_SSR1 <= NEXT_SSR1;
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R_SSR1 <= N_SSR1;
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R_SSR2 <= NEXT_SSR2;
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R_SSR2 <= N_SSR2;
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end if;
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end if;
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end process proc_regs;
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end process proc_regs;
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proc_comb : process (CRESET, IBSEL_SSR1, IB_MREQ,
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proc_comb : process (CRESET, IBSEL_SSR1, IB_MREQ,
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R_SSR1, R_SSR2, TRACE, MONI)
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R_SSR1, R_SSR2, TRACE, MONI)
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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NEXT_SSR1 <= nssr1;
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N_SSR1 <= nssr1;
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NEXT_SSR2 <= nssr2;
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N_SSR2 <= nssr2;
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end process proc_comb;
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end process proc_comb;
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end syn;
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end syn;
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