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-- $Id: ibd_iist.vhd 314 2010-07-09 17:38:41Z mueller $
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-- $Id: ibd_iist.vhd 335 2010-10-24 22:24:23Z mueller $
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--
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--
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-- Copyright 2009- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2009-2010 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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-- Description: ibus dev(loc): IIST
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-- Description: ibus dev(loc): IIST
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--
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--
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-- Dependencies: -
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-- Dependencies: -
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-- Test bench: -
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-- Test bench: -
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-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2, 12.1; ghdl 0.18-0.29
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--
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--
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-- Synthesized (xst):
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-- Synthesized (xst):
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-- Date Rev ise Target flop lutl lutm slic t peri
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-- Date Rev ise Target flop lutl lutm slic t peri
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-- 2010-10-17 333 12.1 M53 xc3s1000-4 112 510 0 291 s 15.8
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-- 2010-10-17 314 12.1 M53 xc3s1000-4 111 504 0 290 s 15.6
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-- 2009-06-01 223 10.1.03 K39 xc3s1000-4 111 439 0 256 s 9.8
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-- 2009-06-01 223 10.1.03 K39 xc3s1000-4 111 439 0 256 s 9.8
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-- 2009-06-01 221 10.1.03 K39 xc3s1000-4 111 449 0 258 s 13.3
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-- 2009-06-01 221 10.1.03 K39 xc3s1000-4 111 449 0 258 s 13.3
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2010-10-17 333 0.8 use ibus V2 interface
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-- 2009-06-07 224 0.7 send inverted stc_stp; remove pgc_err; honor msk_im
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-- 2009-06-07 224 0.7 send inverted stc_stp; remove pgc_err; honor msk_im
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-- also for dcf_dcf and exc_rte; add iist_mreq and
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-- also for dcf_dcf and exc_rte; add iist_mreq and
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-- iist_sreq, boot and lock interfaces
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-- iist_sreq, boot and lock interfaces
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-- 2009-06-05 223 0.6 level interrupt, parity logic, exc.ui logic
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-- 2009-06-05 223 0.6 level interrupt, parity logic, exc.ui logic
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-- st logic modified (partially tested)
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-- st logic modified (partially tested)
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s_stsnd, -- handle st transmit
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s_stsnd, -- handle st transmit
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s_pgsnd -- handle pg transmit
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s_pgsnd -- handle pg transmit
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);
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);
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type regs_type is record -- state registers
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type regs_type is record -- state registers
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ibsel : slbit; -- ibus select
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acr_ac : slv4; -- acr: ac
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acr_ac : slv4; -- acr: ac
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pge_pbe : slv4; -- pge: pg boot ena
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pge_pbe : slv4; -- pge: pg boot ena
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pge_pie : slv4; -- pge: pg int ena
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pge_pie : slv4; -- pge: pg int ena
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pgc_grj : slbit; -- pgc: go reject
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pgc_grj : slbit; -- pgc: go reject
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pgc_pgrmr : slbit; -- pgc: pg req refused
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pgc_pgrmr : slbit; -- pgc: pg req refused
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req_lock : slbit; -- cpu lock request
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req_lock : slbit; -- cpu lock request
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req_boot : slbit; -- cpu boot request
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req_boot : slbit; -- cpu boot request
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end record regs_type;
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end record regs_type;
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constant regs_init : regs_type := (
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constant regs_init : regs_type := (
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'0', -- ibsel
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"0000", -- acr_ac
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"0000", -- acr_ac
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"0000","0000", -- pge_pbe, pge_pie
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"0000","0000", -- pge_pbe, pge_pie
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'0', -- pgc_grj
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'0', -- pgc_grj
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'0','0', -- pgc_pgrmr, pgc_strmr
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'0','0', -- pgc_pgrmr, pgc_strmr
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'0','0', -- pgc_ie, pgc_ptp
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'0','0', -- pgc_ie, pgc_ptp
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proc_next : process (R_REGS, CE_USEC, IB_MREQ, EI_ACK, EI_ACK,
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proc_next : process (R_REGS, CE_USEC, IB_MREQ, EI_ACK, EI_ACK,
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IIST_BUS(0), IIST_BUS(1), IIST_BUS(2), IIST_BUS(3),
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IIST_BUS(0), IIST_BUS(1), IIST_BUS(2), IIST_BUS(3),
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IIST_SRES)
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IIST_SRES)
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variable r : regs_type := regs_init;
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variable r : regs_type := regs_init;
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variable n : regs_type := regs_init;
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variable n : regs_type := regs_init;
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variable ibsel : slbit := '0';
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variable ibhold : slbit := '0';
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variable ibbusy : slbit := '0';
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variable idout : slv16 := (others=>'0');
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variable idout : slv16 := (others=>'0');
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variable ibreq : slbit := '0';
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variable ibrd : slbit := '0';
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variable ibrd : slbit := '0';
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variable ibw0 : slbit := '0';
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variable ibw0 : slbit := '0';
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variable ibw1 : slbit := '0';
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variable ibw1 : slbit := '0';
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variable int_or : slbit := '0';
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variable int_or : slbit := '0';
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variable tcnt256_end : slbit := '0';
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variable tcnt256_end : slbit := '0';
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begin
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begin
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r := R_REGS;
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r := R_REGS;
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n := R_REGS;
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n := R_REGS;
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ibsel := '0';
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ibhold := '0';
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ibbusy := '0';
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idout := (others=>'0');
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idout := (others=>'0');
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ibrd := not IB_MREQ.we;
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ibreq := IB_MREQ.re or IB_MREQ.we;
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ibrd := IB_MREQ.re;
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ibw0 := IB_MREQ.we and IB_MREQ.be0;
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ibw0 := IB_MREQ.we and IB_MREQ.be0;
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ibw1 := IB_MREQ.we and IB_MREQ.be1;
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ibw1 := IB_MREQ.we and IB_MREQ.be1;
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int_or := r.pgc_grj or r.pgc_pgrmr or r.pgc_strmr;
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int_or := r.pgc_grj or r.pgc_pgrmr or r.pgc_strmr;
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for i in r.dcf_dcf'range loop
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for i in r.dcf_dcf'range loop
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act_ibit := '0';
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act_ibit := '0';
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act_bbit := '0';
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act_bbit := '0';
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iout := iist_line_init; -- default state of out line
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iout := iist_line_init; -- default state of out line
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-- ibus address decoder
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-- ibus address decoder
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if IB_MREQ.req='1' and
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n.ibsel := '0';
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if IB_MREQ.aval='1' and
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IB_MREQ.addr(12 downto 2)=ibaddr_iist(12 downto 2) then
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IB_MREQ.addr(12 downto 2)=ibaddr_iist(12 downto 2) then
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ibsel := '1';
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n.ibsel := '1';
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end if;
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end if;
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-- internal state machine
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-- internal state machine
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case r.state is
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case r.state is
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when s_idle => -- idle state
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when s_idle => -- idle state
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elsif r.req_pgsnd = '1' then -- prog. gen. request pending
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elsif r.req_pgsnd = '1' then -- prog. gen. request pending
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n.state := s_pgsnd;
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n.state := s_pgsnd;
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end if;
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end if;
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when s_clear => -- handle acr clr
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when s_clear => -- handle acr clr
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ibbusy := ibsel; -- keep req pending if selected
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ibhold := r.ibsel; -- keep req pending if selected
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ibsel := '0'; -- but don't process selection
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-- r.req_clear is set when in this state and cause a reset in prog_regs
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-- r.req_clear is set when in this state and cause a reset in prog_regs
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-- --> n.req_clear := '0';
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-- --> n.req_clear := '0';
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-- --> n.state := s_idle;
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-- --> n.state := s_idle;
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when s_stsnd => -- handle st transmit
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when s_stsnd => -- handle st transmit
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iout.stf := r.mtc_mttp; -- force type from mtc_mttp
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iout.stf := r.mtc_mttp; -- force type from mtc_mttp
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iout.frm := r.mtc_mfrm; -- force frame from mtc_mfrm
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iout.frm := r.mtc_mfrm; -- force frame from mtc_mfrm
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end if;
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end if;
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-- ibus transactions
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-- ibus transactions
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if ibsel = '1' then
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if r.ibsel = '1' and ibhold='0' then
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if IB_MREQ.addr(1 downto 1) = "0" then -- ACR -- access control reg -----
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if IB_MREQ.addr(1 downto 1) = "0" then -- ACR -- access control reg -----
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idout(acr_ibf_sid) := SID;
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idout(acr_ibf_sid) := SID;
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idout(acr_ibf_ac) := r.acr_ac;
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idout(acr_ibf_ac) := r.acr_ac;
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null;
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null;
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end case;
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end case;
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if unsigned(r.acr_ac) <= unsigned(ac_exc) then -- if ac 0,..,10
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if unsigned(r.acr_ac) <= unsigned(ac_exc) then -- if ac 0,..,10
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if IB_MREQ.dip = '0' then -- if not 1st part of rmw
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if IB_MREQ.rmw = '0' then -- if not 1st part of rmw
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n.acr_ac := unsigned(r.acr_ac) + 1; -- autoincrement
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n.acr_ac := unsigned(r.acr_ac) + 1; -- autoincrement
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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N_REGS <= n;
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N_REGS <= n;
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IB_SRES.dout <= idout;
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IB_SRES.dout <= idout;
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IB_SRES.ack <= ibsel;
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IB_SRES.ack <= r.ibsel and ibreq;
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IB_SRES.busy <= ibbusy;
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IB_SRES.busy <= ibhold and ibreq;
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EI_REQ <= r.pgc_ie and int_or;
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EI_REQ <= r.pgc_ie and int_or;
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if r.mtc_dsdrv = '1' then -- if driver disconnected
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if r.mtc_dsdrv = '1' then -- if driver disconnected
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iout.dcf := '1'; -- set dcf flag
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iout.dcf := '1'; -- set dcf flag
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