URL https://opencores.org/ocsvn/w11/w11/trunk

Subversion Repositories w11

[/] [w11/] [tags/] [w11a_V0.61/] [rtl/] [vlib/] [rlink/] [tb/] [Makefile] - Diff between revs 19 and 25

Rev 19	Rev 25
Line 1...	Line 1...
`# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $`	`# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $`
`#`	`#`
`# Revision History:`	`# Revision History:`
`# Date Rev Version Comment`	`# Date Rev Version Comment`
	`# 2014-07-27 545 1.4.1 make reference board configurable via XTW_BOARD`
`# 2011-08-13 405 1.4 use includes from rtl/make`	`# 2011-08-13 405 1.4 use includes from rtl/make`
`# 2010-12-05 343 1.3 rri->rlink renames`	`# 2010-12-05 343 1.3 rri->rlink renames`
`# 2009-11-21 252 1.2 add ISim support`	`# 2009-11-21 252 1.2 add ISim support`
`# 2007-11-03 95 1.1.2 use .log rather .dat output in check_dsim`	`# 2007-11-03 95 1.1.2 use .log rather .dat output in check_dsim`
`# 2007-09-16 83 1.1.1 add include *.o.dep_ghdl`	`# 2007-09-16 83 1.1.1 add include *.o.dep_ghdl`
Line 12...	Line 13...
`#`	`#`
`EXE_all = tb_rlink_direct`	`EXE_all = tb_rlink_direct`
`EXE_all += tb_rlink_sp1c`	`EXE_all += tb_rlink_sp1c`
`#`	`#`
`# reference board for test synthesis is Spartan-6 based Nexys3`	`# reference board for test synthesis is Spartan-6 based Nexys3`
`include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk`	`ifndef XTW_BOARD`
	`XTW_BOARD=nexys3`
	`endif`
	`include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk`
`#`	`#`
`.PHONY : all all_ssim all_tsim clean`	`.PHONY : all all_ssim all_tsim clean`
`#`	`#`
`all : $(EXE_all)`	`all : $(EXE_all)`
`all_ssim : $(EXE_all:=_ssim)`	`all_ssim : $(EXE_all:=_ssim)`