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-- $Id: pdp11_dbox.vhd 314 2010-07-09 17:38:41Z mueller $
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-- $Id: pdp11_aunit.vhd 330 2010-09-19 17:43:53Z mueller $
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--
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--
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-- Copyright 2006-2007 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2006-2007 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for complete details.
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-- for complete details.
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--
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--
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- Module Name: pdp11_dbox - syn
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-- Module Name: pdp11_aunit - syn
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-- Description: pdp11: arithmetic unit for data (dbox)
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-- Description: pdp11: arithmetic unit for data (aunit)
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--
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--
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-- Dependencies: -
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-- Dependencies: -
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2; ghdl 0.18-0.25
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2, 12.1; ghdl 0.18-0.26
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2010-09-18 300 1.1 renamed from abox
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-- 2007-06-14 56 1.0.1 Use slvtypes.all
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-- 2007-06-14 56 1.0.1 Use slvtypes.all
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-- 2007-05-12 26 1.0 Initial version
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-- 2007-05-12 26 1.0 Initial version
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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library ieee;
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library ieee;
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-- INC: 0 + DST + 1 (dst+1)
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-- INC: 0 + DST + 1 (dst+1)
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-- DEC: ~0 + DST + 0 (dst-1)
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-- DEC: ~0 + DST + 0 (dst-1)
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-- CLR: 0 + 0 + 0 (0)
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-- CLR: 0 + 0 + 0 (0)
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-- SOB: SRC + ~0 + 0 (src-1)
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-- SOB: SRC + ~0 + 0 (src-1)
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entity pdp11_dbox is -- arithmetic unit for data (dbox)
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entity pdp11_aunit is -- arithmetic unit for data (aunit)
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port (
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port (
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DSRC : in slv16; -- 'src' data in
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DSRC : in slv16; -- 'src' data in
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DDST : in slv16; -- 'dst' data in
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DDST : in slv16; -- 'dst' data in
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CI : in slbit; -- carry flag in
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CI : in slbit; -- carry flag in
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SRCMOD : in slv2; -- src modifier mode
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SRCMOD : in slv2; -- src modifier mode
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CCMODE : in slv3; -- cc mode
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CCMODE : in slv3; -- cc mode
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BYTOP : in slbit; -- byte operation
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BYTOP : in slbit; -- byte operation
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DOUT : out slv16; -- data output
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DOUT : out slv16; -- data output
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CCOUT : out slv4 -- condition codes out
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CCOUT : out slv4 -- condition codes out
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);
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);
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end pdp11_dbox;
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end pdp11_aunit;
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architecture syn of pdp11_dbox is
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architecture syn of pdp11_aunit is
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-- --------------------------------------
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-- --------------------------------------
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begin
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begin
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end procedure do_add8_ci_co;
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end procedure do_add8_ci_co;
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begin
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begin
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case SRCMOD is
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case SRCMOD is
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when c_dbox_mod_pass => msrc := DSRC;
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when c_aunit_mod_pass => msrc := DSRC;
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when c_dbox_mod_inv => msrc := not DSRC;
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when c_aunit_mod_inv => msrc := not DSRC;
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when c_dbox_mod_zero => msrc := (others=>'0');
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when c_aunit_mod_zero => msrc := (others=>'0');
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when c_dbox_mod_one => msrc := (others=>'1');
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when c_aunit_mod_one => msrc := (others=>'1');
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when others => null;
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when others => null;
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end case;
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end case;
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case DSTMOD is
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case DSTMOD is
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when c_dbox_mod_pass => mdst := DDST;
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when c_aunit_mod_pass => mdst := DDST;
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when c_dbox_mod_inv => mdst := not DDST;
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when c_aunit_mod_inv => mdst := not DDST;
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when c_dbox_mod_zero => mdst := (others=>'0');
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when c_aunit_mod_zero => mdst := (others=>'0');
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when c_dbox_mod_one => mdst := (others=>'1');
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when c_aunit_mod_one => mdst := (others=>'1');
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when others => null;
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when others => null;
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end case;
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end case;
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case CIMOD is
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case CIMOD is
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when c_dbox_mod_pass => mci := CI;
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when c_aunit_mod_pass => mci := CI;
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when c_dbox_mod_inv => mci := not CI;
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when c_aunit_mod_inv => mci := not CI;
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when c_dbox_mod_zero => mci := '0';
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when c_aunit_mod_zero => mci := '0';
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when c_dbox_mod_one => mci := '1';
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when c_aunit_mod_one => mci := '1';
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when others => null;
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when others => null;
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end case;
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end case;
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do_add8_ci_co(msrc(7 downto 0), mdst(7 downto 0), mci,
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do_add8_ci_co(msrc(7 downto 0), mdst(7 downto 0), mci,
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sum(7 downto 0), co8);
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sum(7 downto 0), co8);
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-- the logic for 2 operand V+C is ugly. It is reverse engineered from
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-- the logic for 2 operand V+C is ugly. It is reverse engineered from
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-- the MOD's the operation type.
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-- the MOD's the operation type.
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if CC1OP = '0' then -- 2 operand cases
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if CC1OP = '0' then -- 2 operand cases
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if unsigned(CIMOD) = unsigned(c_dbox_mod_zero) then -- case ADD
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if unsigned(CIMOD) = unsigned(c_aunit_mod_zero) then -- case ADD
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nvo := not(src_msb xor dst_msb) and (src_msb xor sum_msb);
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nvo := not(src_msb xor dst_msb) and (src_msb xor sum_msb);
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else
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else
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if unsigned(SRCMOD) = unsigned(c_dbox_mod_inv) then -- case SUB
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if unsigned(SRCMOD) = unsigned(c_aunit_mod_inv) then -- case SUB
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nvo := (src_msb xor dst_msb) and not (src_msb xor sum_msb);
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nvo := (src_msb xor dst_msb) and not (src_msb xor sum_msb);
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else -- case CMP
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else -- case CMP
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nvo := (src_msb xor dst_msb) and not (dst_msb xor sum_msb);
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nvo := (src_msb xor dst_msb) and not (dst_msb xor sum_msb);
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end if;
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end if;
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nco := not nco; -- invert C for SUB and CMP
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nco := not nco; -- invert C for SUB and CMP
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end if;
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end if;
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else -- 1 operand cases
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else -- 1 operand cases
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case CCMODE is
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case CCMODE is
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when c_dbox_ccmode_clr|c_dbox_ccmode_tst =>
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when c_aunit_ccmode_clr|c_aunit_ccmode_tst =>
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nvo := '0'; -- force v=0 for tst and clr
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nvo := '0'; -- force v=0 for tst and clr
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nco := '0'; -- force c=0 for tst and clr
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nco := '0'; -- force c=0 for tst and clr
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when c_dbox_ccmode_com =>
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when c_aunit_ccmode_com =>
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nvo := '0'; -- force v=0 for com
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nvo := '0'; -- force v=0 for com
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nco := '1'; -- force c=1 for com
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nco := '1'; -- force c=1 for com
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when c_dbox_ccmode_inc =>
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when c_aunit_ccmode_inc =>
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nvo := sum_msb and not dst_msb;
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nvo := sum_msb and not dst_msb;
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nco := CI; -- C not affected for INC
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nco := CI; -- C not affected for INC
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when c_dbox_ccmode_dec =>
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when c_aunit_ccmode_dec =>
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nvo := not sum_msb and dst_msb;
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nvo := not sum_msb and dst_msb;
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nco := CI; -- C not affected for DEC
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nco := CI; -- C not affected for DEC
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when c_dbox_ccmode_neg =>
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when c_aunit_ccmode_neg =>
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nvo := sum_msb and dst_msb;
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nvo := sum_msb and dst_msb;
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nco := not nzo;
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nco := not nzo;
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when c_dbox_ccmode_adc =>
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when c_aunit_ccmode_adc =>
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nvo := sum_msb and not dst_msb;
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nvo := sum_msb and not dst_msb;
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when c_dbox_ccmode_sbc =>
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when c_aunit_ccmode_sbc =>
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nvo := not sum_msb and dst_msb;
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nvo := not sum_msb and dst_msb;
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nco := not nco;
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nco := not nco;
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when others => null;
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when others => null;
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end case;
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end case;
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