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-- $Id: pdp11_vmbox.vhd 335 2010-10-24 22:24:23Z mueller $
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-- $Id: pdp11_vmbox.vhd 427 2011-11-19 21:04:11Z mueller $
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--
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--
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-- Copyright 2006-2010 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2006-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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-- ibus/ib_sres_or_2
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-- ibus/ib_sres_or_2
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-- ibus/ib_sel
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-- ibus/ib_sel
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--
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--
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Test bench: tb/tb_pdp11_core (implicit)
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-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: xst 8.1, 8.2, 9.1, 9.2, 12.1; ghdl 0.18-0.29
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-- Tool versions: xst 8.2, 9.1, 9.2, 12.1, 13.1; ghdl 0.18-0.29
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2011-11-18 427 1.6.3 now numeric_std clean
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-- 2010-10-23 335 1.6.2 add r.paddr_iopage, use ib_sel
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-- 2010-10-23 335 1.6.2 add r.paddr_iopage, use ib_sel
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-- 2010-10-22 334 1.6.1 deassert ibus be's at end-cycle; fix rmw logic
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-- 2010-10-22 334 1.6.1 deassert ibus be's at end-cycle; fix rmw logic
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-- 2010-10-17 333 1.6 implement ibus V2 interface
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-- 2010-10-17 333 1.6 implement ibus V2 interface
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-- 2010-06-27 310 1.5 redo ibus driver logic, now ibus driven from flops
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-- 2010-06-27 310 1.5 redo ibus driver logic, now ibus driven from flops
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-- 2010-06-20 307 1.4.2 rename cpacc to cacc in vm_cntl_type, mmu_cntl_type
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-- 2010-06-20 307 1.4.2 rename cpacc to cacc in vm_cntl_type, mmu_cntl_type
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-- 2007-05-12 26 1.0 Initial version
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-- 2007-05-12 26 1.0 Initial version
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.numeric_std.all;
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use work.slvtypes.all;
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use work.slvtypes.all;
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use work.iblib.all;
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use work.iblib.all;
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use work.pdp11.all;
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use work.pdp11.all;
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use work.sys_conf.all;
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use work.sys_conf.all;
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);
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);
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end pdp11_vmbox;
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end pdp11_vmbox;
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architecture syn of pdp11_vmbox is
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architecture syn of pdp11_vmbox is
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constant ibaddr_slim : slv16 := conv_std_logic_vector(8#177774#,16);
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constant ibaddr_slim : slv16 := slv(to_unsigned(8#177774#,16));
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constant atowidth : natural := 5; -- size of access timeout counter
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constant atowidth : natural := 5; -- size of access timeout counter
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type state_type is (
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type state_type is (
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s_idle, -- s_idle: wait for vm_cntl request
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s_idle, -- s_idle: wait for vm_cntl request
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s_mem_w, -- s_mem_w: check mmu, wait for memory
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s_mem_w, -- s_mem_w: check mmu, wait for memory
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IB_SRES_SLIM.busy <= '0';
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IB_SRES_SLIM.busy <= '0';
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end process proc_ibres;
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end process proc_ibres;
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proc_slim: process (CLK)
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proc_slim: process (CLK)
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begin
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begin
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if CLK'event and CLK='1' then
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if rising_edge(CLK) then
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if BRESET = '1' then
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if BRESET = '1' then
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R_SLIM <= (others=>'0');
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R_SLIM <= (others=>'0');
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elsif IBSEL_SLIM='1' and IB_MREQ.we='1' then
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elsif IBSEL_SLIM='1' and IB_MREQ.we='1' then
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if IB_MREQ.be1 = '1' then
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if IB_MREQ.be1 = '1' then
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R_SLIM <= IB_MREQ.din(ibf_byte1);
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R_SLIM <= IB_MREQ.din(ibf_byte1);
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end if;
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end if;
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end process proc_slim;
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end process proc_slim;
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proc_regs: process (CLK)
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proc_regs: process (CLK)
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begin
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begin
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if CLK'event and CLK='1' then
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if rising_edge(CLK) then
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if GRESET = '1' then
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if GRESET = '1' then
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R_REGS <= regs_init;
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R_REGS <= regs_init;
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else
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else
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R_REGS <= N_REGS;
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R_REGS <= N_REGS;
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end if;
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end if;
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end if;
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end if;
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if ato_go = '0' then -- handle access timeout counter
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if ato_go = '0' then -- handle access timeout counter
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n.atocnt := atocnt_init; -- if ato_go=0, keep in reset
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n.atocnt := atocnt_init; -- if ato_go=0, keep in reset
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else
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else
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n.atocnt := unsigned(r.atocnt) - 1;-- otherwise count down
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n.atocnt := slv(unsigned(r.atocnt) - 1);-- otherwise count down
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end if;
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end if;
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ipaddr := (others=>'0');
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ipaddr := (others=>'0');
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if paddr_mmu = '1' then
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if paddr_mmu = '1' then
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ipaddr( 5 downto 0) := VM_ADDR(5 downto 0);
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ipaddr( 5 downto 0) := VM_ADDR(5 downto 0);
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