| Line 1... |
Line 1... |
-- $Id: ibdr_maxisys.vhd 641 2015-02-01 22:12:15Z mueller $
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-- $Id: ibdr_maxisys.vhd 679 2015-05-13 17:38:46Z mueller $
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--
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--
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-- Copyright 2009-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2009-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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| Line 15... |
Line 15... |
-- Module Name: ibdr_maxisys - syn
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-- Module Name: ibdr_maxisys - syn
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-- Description: ibus(rem) devices for full system
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-- Description: ibus(rem) devices for full system
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--
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--
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-- Dependencies: ibd_iist
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-- Dependencies: ibd_iist
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-- ibd_kw11l
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-- ibd_kw11l
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-- ibdr_rhrp
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-- ibdr_rl11
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-- ibdr_rl11
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-- ibdr_rk11
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-- ibdr_rk11
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-- ibdr_dl11
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-- ibdr_dl11
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-- ibdr_pc11
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-- ibdr_pc11
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-- ibdr_lp11
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-- ibdr_lp11
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| Line 30... |
Line 31... |
-- Target Devices: generic
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-- Target Devices: generic
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-- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31
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-- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31
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--
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--
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-- Synthesized (xst):
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-- Synthesized (xst):
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-- Date Rev ise Target flop lutl lutm slic t peri
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-- Date Rev ise Target flop lutl lutm slic t peri
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-- 2015-04-06 664 14.7 131013 xc6slx16-2 559 1068 29 410 s 9.1 +RHRP
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-- 2015-01-04 630 14.7 131013 xc6slx16-2 388 761 20 265 s 8.0 +RL11
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-- 2015-01-04 630 14.7 131013 xc6slx16-2 388 761 20 265 s 8.0 +RL11
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-- 2014-06-08 560 14.7 131013 xc6slx16-2 311 615 8 216 s 7.1
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-- 2014-06-08 560 14.7 131013 xc6slx16-2 311 615 8 216 s 7.1
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-- 2010-10-17 333 12.1 M53d xc3s1000-4 312 1058 16 617 s 10.3
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-- 2010-10-17 333 12.1 M53d xc3s1000-4 312 1058 16 617 s 10.3
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-- 2010-10-17 314 12.1 M53d xc3s1000-4 300 1094 16 626 s 10.4
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-- 2010-10-17 314 12.1 M53d xc3s1000-4 300 1094 16 626 s 10.4
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2015-05-10 678 1.3 start/stop/suspend overhaul
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-- 2015-04-06 664 1.2.3 rename RPRM to RHRP
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-- 2015-03-14 658 1.2.2 add RPRM; rearrange intmap (+rhrp,tm11,-kw11-l)
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-- use sys_conf, make most devices configurable
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-- 2015-01-04 630 1.2.1 RL11 back in
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-- 2015-01-04 630 1.2.1 RL11 back in
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-- 2014-06-27 565 1.2.1 temporarily hide RL11
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-- 2014-06-27 565 1.2.1 temporarily hide RL11
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-- 2014-06-08 561 1.2 add rl11
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-- 2014-06-08 561 1.2 add RL11
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-- 2011-11-18 427 1.1.2 now numeric_std clean
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-- 2011-11-18 427 1.1.2 now numeric_std clean
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-- 2010-10-23 335 1.1.1 rename RRI_LAM->RB_LAM
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-- 2010-10-23 335 1.1.1 rename RRI_LAM->RB_LAM
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-- 2010-06-11 303 1.1 use IB_MREQ.racc instead of RRI_REQ
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-- 2010-06-11 303 1.1 use IB_MREQ.racc instead of RRI_REQ
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-- 2009-07-12 233 1.0.4 reorder ports; add RESET, CE_USEC to _dl11
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-- 2009-07-12 233 1.0.4 reorder ports; add RESET, CE_USEC to _dl11
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-- 2009-06-20 227 1.0.3 rename generate labels
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-- 2009-06-20 227 1.0.3 rename generate labels
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| Line 55... |
Line 61... |
--
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--
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-- full system setup
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-- full system setup
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--
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--
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-- ibbase vec pri slot attn sror device name
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-- ibbase vec pri slot attn sror device name
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--
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--
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-- 172540 104 ?7 14 17 - 1/1 KW11-P
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-- 172540 104 ?7 17 - 1/1 KW11-P
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-- 177500 260 6 13 16 - 1/2 IIST
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-- 177500 260 6 15 16 - 1/2 IIST
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-- 177546 100 6 12 15 - 1/3 KW11-L
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-- 177546 100 6 14 15 - 1/3 KW11-L
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-- 174510 120 5 14 9 1/4 DEUNA
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-- 174510 120 5 14 9 1/4 DEUNA
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-- 176700 254 5 13 6 2/1 RH70/RP06
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-- 176700 254 5 13 13 6 2/1 RHRP
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-- 174400 160 5 11 12 5 2/2 RL11
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-- 174400 160 5 12 12 5 2/2 RL11
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-- 177400 220 5 10 11 4 2/3 RK11
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-- 177400 220 5 11 11 4 2/3 RK11
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-- 172520 224 5 10 7 2/4 TM11
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-- 172520 224 5 10 10 7 2/4 TM11
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-- 160100 310? 5 9 9 3 3/1 DZ11-RX
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-- 160100 310? 5 9 9 3 3/1 DZ11-RX
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-- 314? 5 8 8 ^ DZ11-TX
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-- 314? 5 8 8 ^ DZ11-TX
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-- 177560 060 4 7 7 1 3/2 DL11-RX 1st
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-- 177560 060 4 7 7 1 3/2 DL11-RX 1st
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-- 064 4 6 6 ^ DL11-TX 1st
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-- 064 4 6 6 ^ DL11-TX 1st
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-- 176500 300 4 5 5 2 3/3 DL11-RX 2nd
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-- 176500 300 4 5 5 2 3/3 DL11-RX 2nd
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| Line 82... |
Line 88... |
use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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|
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use work.slvtypes.all;
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use work.slvtypes.all;
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use work.iblib.all;
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use work.iblib.all;
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use work.ibdlib.all;
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use work.ibdlib.all;
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use work.sys_conf.all;
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|
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-- ----------------------------------------------------------------------------
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-- ----------------------------------------------------------------------------
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entity ibdr_maxisys is -- ibus(rem) full system
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entity ibdr_maxisys is -- ibus(rem) full system
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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CE_USEC : in slbit; -- usec pulse
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CE_USEC : in slbit; -- usec pulse
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CE_MSEC : in slbit; -- msec pulse
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CE_MSEC : in slbit; -- msec pulse
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RESET : in slbit; -- reset
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RESET : in slbit; -- reset
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BRESET : in slbit; -- ibus reset
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BRESET : in slbit; -- ibus reset
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ITIMER : in slbit; -- instruction timer
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CPUSUSP : in slbit; -- cpu suspended
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RB_LAM : out slv16_1; -- remote attention vector
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RB_LAM : out slv16_1; -- remote attention vector
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_SRES : out ib_sres_type; -- ibus response
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IB_SRES : out ib_sres_type; -- ibus response
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EI_ACKM : in slbit; -- interrupt acknowledge (from master)
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EI_ACKM : in slbit; -- interrupt acknowledge (from master)
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EI_PRI : out slv3; -- interrupt priority (to cpu)
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EI_PRI : out slv3; -- interrupt priority (to cpu)
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| Line 104... |
Line 113... |
end ibdr_maxisys;
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end ibdr_maxisys;
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architecture syn of ibdr_maxisys is
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architecture syn of ibdr_maxisys is
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|
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constant conf_intmap : intmap_array_type :=
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constant conf_intmap : intmap_array_type :=
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(intmap_init, -- line 15
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((8#260#,6), -- line 15 IIST
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(8#104#,6), -- line 14 KW11-P
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(8#100#,6), -- line 14 KW11-L
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(8#260#,6), -- line 13 IIST
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(8#254#,5), -- line 13 RHRP
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(8#100#,6), -- line 12 KW11-L
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(8#160#,5), -- line 12 RL11
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(8#160#,5), -- line 11 RL11
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(8#220#,5), -- line 11 RK11
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(8#220#,5), -- line 10 RK11
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(8#224#,5), -- line 10 TM11
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(8#310#,5), -- line 9 DZ11-RX
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(8#310#,5), -- line 9 DZ11-RX
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(8#314#,5), -- line 8 DZ11-TX
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(8#314#,5), -- line 8 DZ11-TX
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(8#060#,4), -- line 7 DL11-RX 1st
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(8#060#,4), -- line 7 DL11-RX 1st
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(8#064#,4), -- line 6 DL11-TX 1st
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(8#064#,4), -- line 6 DL11-TX 1st
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(8#300#,4), -- line 5 DL11-RX 2nd
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(8#300#,4), -- line 5 DL11-RX 2nd
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(8#304#,4), -- line 4 DL11-TX 2nd
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(8#304#,4), -- line 4 DL11-TX 2nd
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(8#070#,4), -- line 3 PC11-PTR
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(8#070#,4), -- line 3 PC11-PTR
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(8#074#,4), -- line 2 PC11-PTP
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(8#074#,4), -- line 2 PC11-PTP
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(8#200#,4), -- line 1 LP11
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(8#200#,4), -- line 1 LP11
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intmap_init -- line 0
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intmap_init -- line 0 (must be unused!)
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);
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);
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|
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signal RB_LAM_DENUA : slbit := '0';
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signal RB_LAM_DENUA : slbit := '0';
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signal RB_LAM_RP06 : slbit := '0';
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signal RB_LAM_RHRP : slbit := '0';
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signal RB_LAM_RL11 : slbit := '0';
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signal RB_LAM_RL11 : slbit := '0';
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signal RB_LAM_RK11 : slbit := '0';
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signal RB_LAM_RK11 : slbit := '0';
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signal RB_LAM_TM11 : slbit := '0';
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signal RB_LAM_TM11 : slbit := '0';
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signal RB_LAM_DZ11 : slbit := '0';
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signal RB_LAM_DZ11 : slbit := '0';
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signal RB_LAM_DL11_0 : slbit := '0';
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signal RB_LAM_DL11_0 : slbit := '0';
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| Line 137... |
Line 146... |
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signal IB_SRES_IIST : ib_sres_type := ib_sres_init;
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signal IB_SRES_IIST : ib_sres_type := ib_sres_init;
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signal IB_SRES_KW11P : ib_sres_type := ib_sres_init;
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signal IB_SRES_KW11P : ib_sres_type := ib_sres_init;
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signal IB_SRES_KW11L : ib_sres_type := ib_sres_init;
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signal IB_SRES_KW11L : ib_sres_type := ib_sres_init;
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signal IB_SRES_DEUNA : ib_sres_type := ib_sres_init;
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signal IB_SRES_DEUNA : ib_sres_type := ib_sres_init;
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signal IB_SRES_RP06 : ib_sres_type := ib_sres_init;
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signal IB_SRES_RHRP : ib_sres_type := ib_sres_init;
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signal IB_SRES_RL11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_RL11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_RK11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_RK11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_TM11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_TM11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_DZ11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_DZ11 : ib_sres_type := ib_sres_init;
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signal IB_SRES_DL11_0 : ib_sres_type := ib_sres_init;
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signal IB_SRES_DL11_0 : ib_sres_type := ib_sres_init;
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| Line 160... |
Line 169... |
|
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signal EI_REQ_IIST : slbit := '0';
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signal EI_REQ_IIST : slbit := '0';
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signal EI_REQ_KW11P : slbit := '0';
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signal EI_REQ_KW11P : slbit := '0';
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signal EI_REQ_KW11L : slbit := '0';
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signal EI_REQ_KW11L : slbit := '0';
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signal EI_REQ_DEUNA : slbit := '0';
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signal EI_REQ_DEUNA : slbit := '0';
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signal EI_REQ_RP06 : slbit := '0';
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signal EI_REQ_RHRP : slbit := '0';
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signal EI_REQ_RL11 : slbit := '0';
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signal EI_REQ_RL11 : slbit := '0';
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signal EI_REQ_RK11 : slbit := '0';
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signal EI_REQ_RK11 : slbit := '0';
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signal EI_REQ_TM11 : slbit := '0';
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signal EI_REQ_TM11 : slbit := '0';
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signal EI_REQ_DZ11RX : slbit := '0';
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signal EI_REQ_DZ11RX : slbit := '0';
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signal EI_REQ_DZ11TX : slbit := '0';
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signal EI_REQ_DZ11TX : slbit := '0';
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| Line 178... |
Line 187... |
|
|
signal EI_ACK_IIST : slbit := '0';
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signal EI_ACK_IIST : slbit := '0';
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signal EI_ACK_KW11P : slbit := '0';
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signal EI_ACK_KW11P : slbit := '0';
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signal EI_ACK_KW11L : slbit := '0';
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signal EI_ACK_KW11L : slbit := '0';
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signal EI_ACK_DEUNA : slbit := '0';
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signal EI_ACK_DEUNA : slbit := '0';
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signal EI_ACK_RP06 : slbit := '0';
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signal EI_ACK_RHRP : slbit := '0';
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signal EI_ACK_RL11 : slbit := '0';
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signal EI_ACK_RL11 : slbit := '0';
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signal EI_ACK_RK11 : slbit := '0';
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signal EI_ACK_RK11 : slbit := '0';
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signal EI_ACK_TM11 : slbit := '0';
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signal EI_ACK_TM11 : slbit := '0';
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signal EI_ACK_DZ11RX : slbit := '0';
|
signal EI_ACK_DZ11RX : slbit := '0';
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signal EI_ACK_DZ11TX : slbit := '0';
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signal EI_ACK_DZ11TX : slbit := '0';
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| Line 199... |
Line 208... |
signal IIST_MREQ : iist_mreq_type := iist_mreq_init;
|
signal IIST_MREQ : iist_mreq_type := iist_mreq_init;
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signal IIST_SRES : iist_sres_type := iist_sres_init;
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signal IIST_SRES : iist_sres_type := iist_sres_init;
|
|
|
begin
|
begin
|
|
|
IIST: if true generate
|
IIST: if sys_conf_ibd_iist generate
|
begin
|
begin
|
I0 : ibd_iist
|
I0 : ibd_iist
|
port map (
|
port map (
|
CLK => CLK,
|
CLK => CLK,
|
CE_USEC => CE_USEC,
|
CE_USEC => CE_USEC,
|
| Line 230... |
Line 239... |
port map (
|
port map (
|
CLK => CLK,
|
CLK => CLK,
|
CE_MSEC => CE_MSEC,
|
CE_MSEC => CE_MSEC,
|
RESET => RESET,
|
RESET => RESET,
|
BRESET => BRESET,
|
BRESET => BRESET,
|
|
CPUSUSP => CPUSUSP,
|
IB_MREQ => IB_MREQ,
|
IB_MREQ => IB_MREQ,
|
IB_SRES => IB_SRES_KW11L,
|
IB_SRES => IB_SRES_KW11L,
|
EI_REQ => EI_REQ_KW11L,
|
EI_REQ => EI_REQ_KW11L,
|
EI_ACK => EI_ACK_KW11L
|
EI_ACK => EI_ACK_KW11L
|
);
|
);
|
|
|
RL11: if true generate
|
RHRP: if sys_conf_ibd_rhrp generate
|
|
begin
|
|
I0 : ibdr_rhrp
|
|
port map (
|
|
CLK => CLK,
|
|
CE_USEC => CE_USEC,
|
|
BRESET => BRESET,
|
|
ITIMER => ITIMER,
|
|
RB_LAM => RB_LAM_RHRP,
|
|
IB_MREQ => IB_MREQ,
|
|
IB_SRES => IB_SRES_RHRP,
|
|
EI_REQ => EI_REQ_RHRP,
|
|
EI_ACK => EI_ACK_RHRP
|
|
);
|
|
end generate RHRP;
|
|
|
|
RL11: if sys_conf_ibd_rl11 generate
|
begin
|
begin
|
I0 : ibdr_rl11
|
I0 : ibdr_rl11
|
port map (
|
port map (
|
CLK => CLK,
|
CLK => CLK,
|
CE_MSEC => CE_MSEC,
|
CE_MSEC => CE_MSEC,
|
| Line 251... |
Line 277... |
EI_REQ => EI_REQ_RL11,
|
EI_REQ => EI_REQ_RL11,
|
EI_ACK => EI_ACK_RL11
|
EI_ACK => EI_ACK_RL11
|
);
|
);
|
end generate RL11;
|
end generate RL11;
|
|
|
RK11: if true generate
|
RK11: if sys_conf_ibd_rk11 generate
|
begin
|
begin
|
I0 : ibdr_rk11
|
I0 : ibdr_rk11
|
port map (
|
port map (
|
CLK => CLK,
|
CLK => CLK,
|
CE_MSEC => CE_MSEC,
|
CE_MSEC => CE_MSEC,
|
| Line 281... |
Line 307... |
EI_REQ_TX => EI_REQ_DL11TX_0,
|
EI_REQ_TX => EI_REQ_DL11TX_0,
|
EI_ACK_RX => EI_ACK_DL11RX_0,
|
EI_ACK_RX => EI_ACK_DL11RX_0,
|
EI_ACK_TX => EI_ACK_DL11TX_0
|
EI_ACK_TX => EI_ACK_DL11TX_0
|
);
|
);
|
|
|
DL11_1: if true generate
|
DL11_1: if sys_conf_ibd_dl11_1 generate
|
begin
|
begin
|
I0 : ibdr_dl11
|
I0 : ibdr_dl11
|
generic map (
|
generic map (
|
IB_ADDR => slv(to_unsigned(8#176500#,16)))
|
IB_ADDR => slv(to_unsigned(8#176500#,16)))
|
port map (
|
port map (
|
| Line 301... |
Line 327... |
EI_ACK_RX => EI_ACK_DL11RX_1,
|
EI_ACK_RX => EI_ACK_DL11RX_1,
|
EI_ACK_TX => EI_ACK_DL11TX_1
|
EI_ACK_TX => EI_ACK_DL11TX_1
|
);
|
);
|
end generate DL11_1;
|
end generate DL11_1;
|
|
|
PC11: if true generate
|
PC11: if sys_conf_ibd_pc11 generate
|
begin
|
begin
|
I0 : ibdr_pc11
|
I0 : ibdr_pc11
|
port map (
|
port map (
|
CLK => CLK,
|
CLK => CLK,
|
RESET => RESET,
|
RESET => RESET,
|
| Line 318... |
Line 344... |
EI_ACK_PTR => EI_ACK_PC11PTR,
|
EI_ACK_PTR => EI_ACK_PC11PTR,
|
EI_ACK_PTP => EI_ACK_PC11PTP
|
EI_ACK_PTP => EI_ACK_PC11PTP
|
);
|
);
|
end generate PC11;
|
end generate PC11;
|
|
|
LP11: if true generate
|
LP11: if sys_conf_ibd_lp11 generate
|
begin
|
begin
|
I0 : ibdr_lp11
|
I0 : ibdr_lp11
|
port map (
|
port map (
|
CLK => CLK,
|
CLK => CLK,
|
RESET => RESET,
|
RESET => RESET,
|
| Line 353... |
Line 379... |
IB_SRES_OR => IB_SRES_1
|
IB_SRES_OR => IB_SRES_1
|
);
|
);
|
|
|
SRES_OR_2 : ib_sres_or_4
|
SRES_OR_2 : ib_sres_or_4
|
port map (
|
port map (
|
IB_SRES_1 => IB_SRES_RP06,
|
IB_SRES_1 => IB_SRES_RHRP,
|
IB_SRES_2 => IB_SRES_RL11,
|
IB_SRES_2 => IB_SRES_RL11,
|
IB_SRES_3 => IB_SRES_RK11,
|
IB_SRES_3 => IB_SRES_RK11,
|
IB_SRES_4 => IB_SRES_TM11,
|
IB_SRES_4 => IB_SRES_TM11,
|
IB_SRES_OR => IB_SRES_2
|
IB_SRES_OR => IB_SRES_2
|
);
|
);
|
| Line 396... |
Line 422... |
EI_ACK => EI_ACK,
|
EI_ACK => EI_ACK,
|
EI_PRI => EI_PRI,
|
EI_PRI => EI_PRI,
|
EI_VECT => EI_VECT
|
EI_VECT => EI_VECT
|
);
|
);
|
|
|
EI_REQ(14) <= EI_REQ_KW11P;
|
EI_REQ(15) <= EI_REQ_IIST;
|
EI_REQ(13) <= EI_REQ_IIST;
|
EI_REQ(14) <= EI_REQ_KW11L;
|
EI_REQ(12) <= EI_REQ_KW11L;
|
EI_REQ(13) <= EI_REQ_RHRP;
|
EI_REQ(11) <= EI_REQ_RL11;
|
EI_REQ(12) <= EI_REQ_RL11;
|
EI_REQ(10) <= EI_REQ_RK11;
|
EI_REQ(11) <= EI_REQ_RK11;
|
|
EI_REQ(10) <= EI_REQ_TM11;
|
EI_REQ( 9) <= EI_REQ_DZ11RX;
|
EI_REQ( 9) <= EI_REQ_DZ11RX;
|
EI_REQ( 8) <= EI_REQ_DZ11TX;
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EI_REQ( 8) <= EI_REQ_DZ11TX;
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EI_REQ( 7) <= EI_REQ_DL11RX_0;
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EI_REQ( 7) <= EI_REQ_DL11RX_0;
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EI_REQ( 6) <= EI_REQ_DL11TX_0;
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EI_REQ( 6) <= EI_REQ_DL11TX_0;
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EI_REQ( 5) <= EI_REQ_DL11RX_1;
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EI_REQ( 5) <= EI_REQ_DL11RX_1;
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EI_REQ( 4) <= EI_REQ_DL11TX_1;
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EI_REQ( 4) <= EI_REQ_DL11TX_1;
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EI_REQ( 3) <= EI_REQ_PC11PTR;
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EI_REQ( 3) <= EI_REQ_PC11PTR;
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EI_REQ( 2) <= EI_REQ_PC11PTP;
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EI_REQ( 2) <= EI_REQ_PC11PTP;
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EI_REQ( 1) <= EI_REQ_LP11;
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EI_REQ( 1) <= EI_REQ_LP11;
|
|
|
EI_ACK_KW11P <= EI_ACK(14);
|
EI_ACK_IIST <= EI_ACK(15);
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EI_ACK_IIST <= EI_ACK(13);
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EI_ACK_KW11L <= EI_ACK(14);
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EI_ACK_KW11L <= EI_ACK(12);
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EI_ACK_RHRP <= EI_ACK(13);
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EI_ACK_RL11 <= EI_ACK(11);
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EI_ACK_RL11 <= EI_ACK(12);
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EI_ACK_RK11 <= EI_ACK(10);
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EI_ACK_RK11 <= EI_ACK(11);
|
|
EI_ACK_TM11 <= EI_ACK(10);
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EI_ACK_DZ11RX <= EI_ACK( 9);
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EI_ACK_DZ11RX <= EI_ACK( 9);
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EI_ACK_DZ11TX <= EI_ACK( 8);
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EI_ACK_DZ11TX <= EI_ACK( 8);
|
EI_ACK_DL11RX_0 <= EI_ACK( 7);
|
EI_ACK_DL11RX_0 <= EI_ACK( 7);
|
EI_ACK_DL11TX_0 <= EI_ACK( 6);
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EI_ACK_DL11TX_0 <= EI_ACK( 6);
|
EI_ACK_DL11RX_1 <= EI_ACK( 5);
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EI_ACK_DL11RX_1 <= EI_ACK( 5);
|
| Line 431... |
Line 459... |
RB_LAM(15 downto 11) <= (others=>'0');
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RB_LAM(15 downto 11) <= (others=>'0');
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RB_LAM(10) <= RB_LAM_PC11;
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RB_LAM(10) <= RB_LAM_PC11;
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RB_LAM( 9) <= RB_LAM_DENUA;
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RB_LAM( 9) <= RB_LAM_DENUA;
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RB_LAM( 8) <= RB_LAM_LP11;
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RB_LAM( 8) <= RB_LAM_LP11;
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RB_LAM( 7) <= RB_LAM_TM11;
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RB_LAM( 7) <= RB_LAM_TM11;
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RB_LAM( 6) <= RB_LAM_RP06;
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RB_LAM( 6) <= RB_LAM_RHRP;
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RB_LAM( 5) <= RB_LAM_RL11;
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RB_LAM( 5) <= RB_LAM_RL11;
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RB_LAM( 4) <= RB_LAM_RK11;
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RB_LAM( 4) <= RB_LAM_RK11;
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RB_LAM( 3) <= RB_LAM_DZ11;
|
RB_LAM( 3) <= RB_LAM_DZ11;
|
RB_LAM( 2) <= RB_LAM_DL11_1;
|
RB_LAM( 2) <= RB_LAM_DL11_1;
|
RB_LAM( 1) <= RB_LAM_DL11_0;
|
RB_LAM( 1) <= RB_LAM_DL11_0;
|
