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-- $Id: pdp11.vhd 649 2015-02-21 21:10:16Z mueller $
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-- $Id: pdp11.vhd 677 2015-05-09 21:52:32Z mueller $
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--
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--
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-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2006-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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-- Dependencies: -
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-- Dependencies: -
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-- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31
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-- Tool versions: ise 8.2-14.7; viv 2014.4; ghdl 0.18-0.31
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2015-05-09 677 1.6 start/stop/suspend overhaul; reset overhaul
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-- 2015-05-01 672 1.5.5 add pdp11_sys70, sys_hio70
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-- 2015-04-30 670 1.5.4 rename pdp11_sys70 -> pdp11_reg70
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-- 2015-02-20 649 1.5.3 add pdp11_statleds
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-- 2015-02-20 649 1.5.3 add pdp11_statleds
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-- 2015-02-08 644 1.5.2 add pdp11_bram_memctl
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-- 2015-02-08 644 1.5.2 add pdp11_bram_memctl
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-- 2014-08-28 588 1.5.1 use new rlink v4 iface and 4 bit STAT
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-- 2014-08-28 588 1.5.1 use new rlink v4 iface and 4 bit STAT
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-- 2014-08-15 583 1.5 rb_mreq addr now 16 bit
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-- 2014-08-15 583 1.5 rb_mreq addr now 16 bit
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-- 2014-08-10: 581 1.4.10 add c_cc_f_* field defs for condition code array
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-- 2014-08-10: 581 1.4.10 add c_cc_f_* field defs for condition code array
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| Line 341... |
Line 344... |
cmdack : slbit; -- command acknowledge
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cmdack : slbit; -- command acknowledge
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cmderr : slbit; -- command error
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cmderr : slbit; -- command error
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cmdmerr : slbit; -- command memory access error
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cmdmerr : slbit; -- command memory access error
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cpugo : slbit; -- CPU go state
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cpugo : slbit; -- CPU go state
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cpustep : slbit; -- CPU step flag
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cpustep : slbit; -- CPU step flag
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cpuhalt : slbit; -- CPU halt flag
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cpususp : slbit; -- CPU susp flag
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cpuwait : slbit; -- CPU wait flag
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cpuwait : slbit; -- CPU wait flag
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cpurust : slv4; -- CPU run status
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cpurust : slv4; -- CPU run status
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suspint : slbit; -- internal suspend flag
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suspext : slbit; -- external suspend flag
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cpfunc : slv5; -- current control port function
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cpfunc : slv5; -- current control port function
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cprnum : slv3; -- current control port register number
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cprnum : slv3; -- current control port register number
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waitsusp : slbit; -- WAIT instruction suspended
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waitsusp : slbit; -- WAIT instruction suspended
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itimer : slbit; -- ITIMER pulse
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creset : slbit; -- CRESET pulse
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breset : slbit; -- BRESET pulse
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intack : slbit; -- INT_ACK pulse
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intvect : slv9_2; -- current interrupt vector
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intvect : slv9_2; -- current interrupt vector
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trap_mmu : slbit; -- mmu trace trap pending
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trap_mmu : slbit; -- mmu trace trap pending
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trap_ysv : slbit; -- ysv trap pending
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trap_ysv : slbit; -- ysv trap pending
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prefdone : slbit; -- prefetch done
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prefdone : slbit; -- prefetch done
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do_gprwe : slbit; -- pending gpr_we
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do_gprwe : slbit; -- pending gpr_we
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do_intrsv : slbit; -- active rsv interrupt sequence
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do_intrsv : slbit; -- active rsv interrupt sequence
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end record cpustat_type;
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end record cpustat_type;
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constant cpustat_init : cpustat_type := (
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constant cpustat_init : cpustat_type := (
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'0','0','0','0', -- cmd..
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'0','0','0','0', -- cmdbusy,cmdack,cmderr,cmdmerr
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'0','0','0','0', -- cpu..
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'0','0','0','0', -- cpugo,cpustep,cpususp,cpuwait
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c_cpurust_init, -- cpurust
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c_cpurust_init, -- cpurust
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'0','0', -- suspint,suspext
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"00000","000", -- cpfunc, cprnum
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"00000","000", -- cpfunc, cprnum
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'0', -- waitsusp
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'0', -- waitsusp
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'0','0','0','0', -- itimer,creset,breset,intack
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(others=>'0'), -- intvect
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(others=>'0'), -- intvect
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'0','0','0', -- trap_(mmu|ysv), prefdone
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'0','0','0', -- trap_(mmu|ysv), prefdone
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'0','0' -- do_gprwe, do_intrsv
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'0','0' -- do_gprwe, do_intrsv
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);
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);
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| Line 528... |
Line 539... |
func : slv5; -- function
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func : slv5; -- function
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rnum : slv3; -- register number
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rnum : slv3; -- register number
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end record cp_cntl_type;
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end record cp_cntl_type;
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constant c_cpfunc_noop : slv5 := "00000"; -- noop : no operation
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constant c_cpfunc_noop : slv5 := "00000"; -- noop : no operation
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constant c_cpfunc_sta : slv5 := "00001"; -- sta : cpu start
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constant c_cpfunc_start : slv5 := "00001"; -- sta : cpu start
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constant c_cpfunc_sto : slv5 := "00010"; -- sto : cpu stop
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constant c_cpfunc_stop : slv5 := "00010"; -- sto : cpu stop
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constant c_cpfunc_cont : slv5 := "00011"; -- cont : cpu continue
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constant c_cpfunc_step : slv5 := "00011"; -- cont : cpu step
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constant c_cpfunc_step : slv5 := "00100"; -- step : cpu step
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constant c_cpfunc_creset : slv5 := "00100"; -- step : cpu cpu reset
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constant c_cpfunc_rst : slv5 := "01111"; -- rst : cpu reset (soft)
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constant c_cpfunc_breset : slv5 := "00101"; -- rst : cpu bus reset
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constant c_cpfunc_suspend : slv5 := "00110"; -- rst : cpu suspend
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constant c_cpfunc_resume : slv5 := "00111"; -- rst : cpu resume
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constant c_cpfunc_rreg : slv5 := "10000"; -- rreg : read register
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constant c_cpfunc_rreg : slv5 := "10000"; -- rreg : read register
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constant c_cpfunc_wreg : slv5 := "10001"; -- wreg : write register
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constant c_cpfunc_wreg : slv5 := "10001"; -- wreg : write register
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constant c_cpfunc_rpsw : slv5 := "10010"; -- rpsw : read psw
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constant c_cpfunc_rpsw : slv5 := "10010"; -- rpsw : read psw
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constant c_cpfunc_wpsw : slv5 := "10011"; -- wpsw : write psw
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constant c_cpfunc_wpsw : slv5 := "10011"; -- wpsw : write psw
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constant c_cpfunc_rmem : slv5 := "10100"; -- rmem : read memory
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constant c_cpfunc_rmem : slv5 := "10100"; -- rmem : read memory
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| Line 549... |
Line 563... |
cmdack : slbit; -- command acknowledge
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cmdack : slbit; -- command acknowledge
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cmderr : slbit; -- command error
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cmderr : slbit; -- command error
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cmdmerr : slbit; -- command memory access error
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cmdmerr : slbit; -- command memory access error
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cpugo : slbit; -- CPU go state
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cpugo : slbit; -- CPU go state
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cpustep : slbit; -- CPU step flag
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cpustep : slbit; -- CPU step flag
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cpuhalt : slbit; -- CPU halt flag
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cpuwait : slbit; -- CPU wait flag
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cpuwait : slbit; -- CPU wait flag
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cpususp : slbit; -- CPU susp flag
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cpurust : slv4; -- CPU run status
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cpurust : slv4; -- CPU run status
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suspint : slbit; -- internal suspend
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suspext : slbit; -- external suspend
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end record cp_stat_type;
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end record cp_stat_type;
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constant cp_stat_init : cp_stat_type := (
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constant cp_stat_init : cp_stat_type := (
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'0','0','0','0', -- cmd...
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'0','0','0','0', -- cmd...
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'0','0','0','0', -- cpu...
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'0','0','0','0', -- cpu...
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(others=>'0') -- cpurust
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(others=>'0'), -- cpurust
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'0','0' -- susp...
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);
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);
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type cp_addr_type is record -- control port address
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type cp_addr_type is record -- control port address
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addr : slv22_1; -- address
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addr : slv22_1; -- address
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racc : slbit; -- ibus remote access
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racc : slbit; -- ibus remote access
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| Line 617... |
Line 634... |
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constant dm_stat_vm_init : dm_stat_vm_type := (ib_mreq_init,ib_sres_init);
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constant dm_stat_vm_init : dm_stat_vm_type := (ib_mreq_init,ib_sres_init);
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type dm_stat_co_type is record -- debug and monitor status - core
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type dm_stat_co_type is record -- debug and monitor status - core
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cpugo : slbit; -- cpugo state flag
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cpugo : slbit; -- cpugo state flag
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cpuhalt : slbit; -- cpuhalt state flag
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cpususp : slbit; -- cpususp state flag
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suspint : slbit; -- suspint state flag
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suspext : slbit; -- suspext state flag
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end record dm_stat_co_type;
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end record dm_stat_co_type;
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constant dm_stat_co_init : dm_stat_co_type := ('0','0');
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constant dm_stat_co_init : dm_stat_co_type := (
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'0','0', -- cpu...
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'0','0' -- susp...
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);
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type dm_stat_sy_type is record -- debug and monitor status - system
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type dm_stat_sy_type is record -- debug and monitor status - system
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emmreq : em_mreq_type; -- external memory: request
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emmreq : em_mreq_type; -- external memory: request
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emsres : em_sres_type; -- external memory: response
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emsres : em_sres_type; -- external memory: response
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chit : slbit; -- cache hit
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chit : slbit; -- cache hit
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end record dm_stat_sy_type;
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end record dm_stat_sy_type;
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constant dm_stat_sy_init : dm_stat_sy_type := (em_mreq_init,em_sres_init,'0');
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constant dm_stat_sy_init : dm_stat_sy_type := (
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em_mreq_init, -- emmreq
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em_sres_init, -- emsres
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'0' -- chit
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);
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-- rbus interface definitions ------------------------------------------------
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-- rbus interface definitions ------------------------------------------------
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constant c_rbaddr_conf : slv5 := "00000"; -- R/W configuration reg
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constant c_rbaddr_conf : slv5 := "00000"; -- R/W configuration reg
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constant c_rbaddr_cntl : slv5 := "00001"; -- -/F control reg
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constant c_rbaddr_cntl : slv5 := "00001"; -- -/F control reg
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| Line 657... |
Line 683... |
subtype c_al_rbf_addr is integer range 15 downto 1; -- al: address
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subtype c_al_rbf_addr is integer range 15 downto 1; -- al: address
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constant c_ah_rbf_ena_ubmap: integer := 7; -- ah: ubmap
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constant c_ah_rbf_ena_ubmap: integer := 7; -- ah: ubmap
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constant c_ah_rbf_ena_22bit: integer := 6; -- ah: 22bit
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constant c_ah_rbf_ena_22bit: integer := 6; -- ah: 22bit
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subtype c_ah_rbf_addr is integer range 5 downto 0; -- ah: address
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subtype c_ah_rbf_addr is integer range 5 downto 0; -- ah: address
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constant c_stat_rbf_cmderr: integer := 0; -- stat field: cmderr
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constant c_stat_rbf_suspext: integer := 9; -- stat field: suspext
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constant c_stat_rbf_cmdmerr: integer := 1; -- stat field: cmdmerr
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constant c_stat_rbf_suspint: integer := 8; -- stat field: suspint
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constant c_stat_rbf_cpugo: integer := 2; -- stat field: cpugo
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constant c_stat_rbf_cpuhalt: integer := 3; -- stat field: cpuhalt
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subtype c_stat_rbf_cpurust is integer range 7 downto 4; -- cpurust
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subtype c_stat_rbf_cpurust is integer range 7 downto 4; -- cpurust
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constant c_stat_rbf_cpususp: integer := 3; -- stat field: cpususp
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constant c_stat_rbf_cpugo: integer := 2; -- stat field: cpugo
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constant c_stat_rbf_cmdmerr: integer := 1; -- stat field: cmdmerr
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constant c_stat_rbf_cmderr: integer := 0; -- stat field: cmderr
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subtype c_membe_rbf_be is integer range 1 downto 0; -- membe: be's
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subtype c_membe_rbf_be is integer range 1 downto 0; -- membe: be's
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constant c_membe_rbf_stick: integer := 2; -- membe: sticky flag
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constant c_membe_rbf_stick: integer := 2; -- membe: sticky flag
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-- -------------------------------------
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-- -------------------------------------
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| Line 692... |
Line 720... |
constant c_gpr_pc : slv3 := "111"; -- register number of PC
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constant c_gpr_pc : slv3 := "111"; -- register number of PC
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component pdp11_psr is -- processor status word register
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component pdp11_psr is -- processor status word register
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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CRESET : in slbit; -- console reset
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CRESET : in slbit; -- cpu reset
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DIN : in slv16; -- input data
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DIN : in slv16; -- input data
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CCIN : in slv4; -- cc input
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CCIN : in slv4; -- cc input
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CCWE : in slbit; -- enable update cc
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CCWE : in slbit; -- enable update cc
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WE : in slbit; -- write enable (from DIN)
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WE : in slbit; -- write enable (from DIN)
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FUNC : in slv3; -- write function (from DIN)
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FUNC : in slv3; -- write function (from DIN)
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| Line 841... |
Line 869... |
end component;
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end component;
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component pdp11_mmu_ssr12 is -- mmu register ssr1 and ssr2
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component pdp11_mmu_ssr12 is -- mmu register ssr1 and ssr2
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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CRESET : in slbit; -- console reset
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CRESET : in slbit; -- cpu reset
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TRACE : in slbit; -- trace enable
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TRACE : in slbit; -- trace enable
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MONI : in mmu_moni_type; -- MMU monitor port data
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MONI : in mmu_moni_type; -- MMU monitor port data
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_SRES : out ib_sres_type -- ibus response
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IB_SRES : out ib_sres_type -- ibus response
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);
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);
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end component;
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end component;
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component pdp11_mmu is -- mmu - memory management unit
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component pdp11_mmu is -- mmu - memory management unit
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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CRESET : in slbit; -- console reset
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CRESET : in slbit; -- cpu reset
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BRESET : in slbit; -- ibus reset
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BRESET : in slbit; -- bus reset
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CNTL : in mmu_cntl_type; -- control port
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CNTL : in mmu_cntl_type; -- control port
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VADDR : in slv16; -- virtual address
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VADDR : in slv16; -- virtual address
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MONI : in mmu_moni_type; -- monitor port
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MONI : in mmu_moni_type; -- monitor port
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STAT : out mmu_stat_type; -- status port
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STAT : out mmu_stat_type; -- status port
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PADDRH : out slv16; -- physical address (upper 16 bit)
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PADDRH : out slv16; -- physical address (upper 16 bit)
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| Line 867... |
Line 895... |
end component;
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end component;
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component pdp11_vmbox is -- virtual memory
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component pdp11_vmbox is -- virtual memory
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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GRESET : in slbit; -- global reset
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GRESET : in slbit; -- general reset
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CRESET : in slbit; -- console reset
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CRESET : in slbit; -- cpu reset
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BRESET : in slbit; -- ibus reset
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BRESET : in slbit; -- bus reset
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CP_ADDR : in cp_addr_type; -- console port address
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CP_ADDR : in cp_addr_type; -- console port address
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VM_CNTL : in vm_cntl_type; -- vm control port
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VM_CNTL : in vm_cntl_type; -- vm control port
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VM_ADDR : in slv16; -- vm address
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VM_ADDR : in slv16; -- vm address
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VM_DIN : in slv16; -- vm data in
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VM_DIN : in slv16; -- vm data in
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VM_STAT : out vm_stat_type; -- vm status port
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VM_STAT : out vm_stat_type; -- vm status port
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| Line 889... |
Line 917... |
end component;
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end component;
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|
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component pdp11_dpath is -- CPU datapath
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component pdp11_dpath is -- CPU datapath
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port (
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port (
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CLK : in slbit; -- clock
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CLK : in slbit; -- clock
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CRESET : in slbit; -- console reset
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CRESET : in slbit; -- cpu reset
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CNTL : in dpath_cntl_type; -- control interface
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CNTL : in dpath_cntl_type; -- control interface
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STAT : out dpath_stat_type; -- status interface
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STAT : out dpath_stat_type; -- status interface
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CP_DIN : in slv16; -- console port data in
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CP_DIN : in slv16; -- console port data in
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CP_DOUT : out slv16; -- console port data out
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CP_DOUT : out slv16; -- console port data out
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PSWOUT : out psw_type; -- current psw
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PSWOUT : out psw_type; -- current psw
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| Line 902... |
Line 930... |
VM_ADDR : out slv16; -- virt. memory address
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VM_ADDR : out slv16; -- virt. memory address
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VM_DOUT : in slv16; -- virt. memory data out
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VM_DOUT : in slv16; -- virt. memory data out
|
VM_DIN : out slv16; -- virt. memory data in
|
VM_DIN : out slv16; -- virt. memory data in
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_MREQ : in ib_mreq_type; -- ibus request
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IB_SRES : out ib_sres_type; -- ibus response
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IB_SRES : out ib_sres_type; -- ibus response
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DM_STAT_DP : out dm_stat_dp_type -- debug and monitor status
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DM_STAT_DP : out dm_stat_dp_type -- debug and monitor status - dpath
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_decode is -- instruction decoder
|
component pdp11_decode is -- instruction decoder
|
port (
|
port (
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| Line 916... |
Line 944... |
end component;
|
end component;
|
|
|
component pdp11_sequencer is -- cpu sequencer
|
component pdp11_sequencer is -- cpu sequencer
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
GRESET : in slbit; -- global reset
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GRESET : in slbit; -- general reset
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PSW : in psw_type; -- processor status
|
PSW : in psw_type; -- processor status
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PC : in slv16; -- program counter
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PC : in slv16; -- program counter
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IREG : in slv16; -- IREG
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IREG : in slv16; -- IREG
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ID_STAT : in decode_stat_type; -- instr. decoder status
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ID_STAT : in decode_stat_type; -- instr. decoder status
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DP_STAT : in dpath_stat_type; -- data path status
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DP_STAT : in dpath_stat_type; -- data path status
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CP_CNTL : in cp_cntl_type; -- console port control
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CP_CNTL : in cp_cntl_type; -- console port control
|
VM_STAT : in vm_stat_type; -- virtual memory status port
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VM_STAT : in vm_stat_type; -- virtual memory status port
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INT_PRI : in slv3; -- interrupt priority
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INT_PRI : in slv3; -- interrupt priority
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INT_VECT : in slv9_2; -- interrupt vector
|
INT_VECT : in slv9_2; -- interrupt vector
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CRESET : out slbit; -- console reset
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INT_ACK : out slbit; -- interrupt acknowledge
|
BRESET : out slbit; -- ibus reset
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CRESET : out slbit; -- cpu reset
|
|
BRESET : out slbit; -- bus reset
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MMU_MONI : out mmu_moni_type; -- mmu monitor port
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MMU_MONI : out mmu_moni_type; -- mmu monitor port
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DP_CNTL : out dpath_cntl_type; -- data path control
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DP_CNTL : out dpath_cntl_type; -- data path control
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VM_CNTL : out vm_cntl_type; -- virtual memory control port
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VM_CNTL : out vm_cntl_type; -- virtual memory control port
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CP_STAT : out cp_stat_type; -- console port status
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CP_STAT : out cp_stat_type; -- console port status
|
INT_ACK : out slbit; -- interrupt acknowledge
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ESUSP_O : out slbit; -- external suspend output
|
|
ESUSP_I : in slbit; -- external suspend input
|
|
ITIMER : out slbit; -- instruction timer
|
|
EBREAK : in slbit; -- execution break
|
|
DBREAK : in slbit; -- data break
|
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_SRES : out ib_sres_type -- ibus response
|
IB_SRES : out ib_sres_type -- ibus response
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_irq is -- interrupt requester
|
component pdp11_irq is -- interrupt requester
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
BRESET : in slbit; -- ibus reset
|
BRESET : in slbit; -- bus reset
|
INT_ACK : in slbit; -- interrupt acknowledge from CPU
|
INT_ACK : in slbit; -- interrupt acknowledge from CPU
|
EI_PRI : in slv3; -- external interrupt priority
|
EI_PRI : in slv3; -- external interrupt priority
|
EI_VECT : in slv9_2; -- external interrupt vector
|
EI_VECT : in slv9_2; -- external interrupt vector
|
EI_ACKM : out slbit; -- external interrupt acknowledge
|
EI_ACKM : out slbit; -- external interrupt acknowledge
|
PRI : out slv3; -- interrupt priority
|
PRI : out slv3; -- interrupt priority
|
| Line 964... |
Line 997... |
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_SRES : out ib_sres_type -- ibus response
|
IB_SRES : out ib_sres_type -- ibus response
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_sys70 is -- 11/70 memory system registers
|
component pdp11_reg70 is -- 11/70 memory system registers
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
CRESET : in slbit; -- console reset
|
CRESET : in slbit; -- cpu reset
|
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_SRES : out ib_sres_type -- ibus response
|
IB_SRES : out ib_sres_type -- ibus response
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_mem70 is -- 11/70 memory system registers
|
component pdp11_mem70 is -- 11/70 memory system registers
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
CRESET : in slbit; -- console reset
|
CRESET : in slbit; -- cpu reset
|
HM_ENA : in slbit; -- hit/miss enable
|
HM_ENA : in slbit; -- hit/miss enable
|
HM_VAL : in slbit; -- hit/miss value
|
HM_VAL : in slbit; -- hit/miss value
|
CACHE_FMISS : out slbit; -- cache force miss
|
CACHE_FMISS : out slbit; -- cache force miss
|
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_MREQ : in ib_mreq_type; -- ibus request
|
IB_SRES : out ib_sres_type -- ibus response
|
IB_SRES : out ib_sres_type -- ibus response
|
| Line 988... |
Line 1021... |
end component;
|
end component;
|
|
|
component pdp11_cache is -- cache
|
component pdp11_cache is -- cache
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
GRESET : in slbit; -- global reset
|
GRESET : in slbit; -- general reset
|
EM_MREQ : in em_mreq_type; -- em request
|
EM_MREQ : in em_mreq_type; -- em request
|
EM_SRES : out em_sres_type; -- em response
|
EM_SRES : out em_sres_type; -- em response
|
FMISS : in slbit; -- force miss
|
FMISS : in slbit; -- force miss
|
CHIT : out slbit; -- cache hit flag
|
CHIT : out slbit; -- cache hit flag
|
MEM_REQ : out slbit; -- memory: request
|
MEM_REQ : out slbit; -- memory: request
|
| Line 1013... |
Line 1046... |
CP_CNTL : in cp_cntl_type; -- console control port
|
CP_CNTL : in cp_cntl_type; -- console control port
|
CP_ADDR : in cp_addr_type; -- console address port
|
CP_ADDR : in cp_addr_type; -- console address port
|
CP_DIN : in slv16; -- console data in
|
CP_DIN : in slv16; -- console data in
|
CP_STAT : out cp_stat_type; -- console status port
|
CP_STAT : out cp_stat_type; -- console status port
|
CP_DOUT : out slv16; -- console data out
|
CP_DOUT : out slv16; -- console data out
|
|
ESUSP_O : out slbit; -- external suspend output
|
|
ESUSP_I : in slbit; -- external suspend input
|
|
ITIMER : out slbit; -- instruction timer
|
|
EBREAK : in slbit; -- execution break
|
|
DBREAK : in slbit; -- data break
|
EI_PRI : in slv3; -- external interrupt priority
|
EI_PRI : in slv3; -- external interrupt priority
|
EI_VECT : in slv9_2; -- external interrupt vector
|
EI_VECT : in slv9_2; -- external interrupt vector
|
EI_ACKM : out slbit; -- external interrupt acknowledge
|
EI_ACKM : out slbit; -- external interrupt acknowledge
|
EM_MREQ : out em_mreq_type; -- external memory: request
|
EM_MREQ : out em_mreq_type; -- external memory: request
|
EM_SRES : in em_sres_type; -- external memory: response
|
EM_SRES : in em_sres_type; -- external memory: response
|
BRESET : out slbit; -- ibus reset
|
CRESET : out slbit; -- cpu reset
|
|
BRESET : out slbit; -- bus reset
|
IB_MREQ_M : out ib_mreq_type; -- ibus master request (master)
|
IB_MREQ_M : out ib_mreq_type; -- ibus master request (master)
|
IB_SRES_M : in ib_sres_type; -- ibus slave response (master)
|
IB_SRES_M : in ib_sres_type; -- ibus slave response (master)
|
DM_STAT_DP : out dm_stat_dp_type; -- debug and monitor status - dpath
|
DM_STAT_DP : out dm_stat_dp_type; -- debug and monitor status - dpath
|
DM_STAT_VM : out dm_stat_vm_type; -- debug and monitor status - vmbox
|
DM_STAT_VM : out dm_stat_vm_type; -- debug and monitor status - vmbox
|
DM_STAT_CO : out dm_stat_co_type -- debug and monitor status - core
|
DM_STAT_CO : out dm_stat_co_type -- debug and monitor status - core
|
| Line 1031... |
Line 1070... |
|
|
component pdp11_tmu is -- trace and monitor unit
|
component pdp11_tmu is -- trace and monitor unit
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
ENA : in slbit := '0'; -- enable trace output
|
ENA : in slbit := '0'; -- enable trace output
|
DM_STAT_DP : in dm_stat_dp_type; -- DM dpath
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
|
DM_STAT_VM : in dm_stat_vm_type; -- DM vmbox
|
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox
|
DM_STAT_CO : in dm_stat_co_type; -- DM core
|
DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core
|
DM_STAT_SY : in dm_stat_sy_type -- DM system
|
DM_STAT_SY : in dm_stat_sy_type -- debug and monitor status - system
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_tmu_sb is -- trace and mon. unit; simbus wrapper
|
component pdp11_tmu_sb is -- trace and mon. unit; simbus wrapper
|
generic (
|
generic (
|
ENAPIN : integer := 13); -- SB_CNTL signal to use for enable
|
ENAPIN : integer := 13); -- SB_CNTL signal to use for enable
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
DM_STAT_DP : in dm_stat_dp_type; -- DM dpath
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
|
DM_STAT_VM : in dm_stat_vm_type; -- DM vmbox
|
DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox
|
DM_STAT_CO : in dm_stat_co_type; -- DM core
|
DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core
|
DM_STAT_SY : in dm_stat_sy_type -- DM system
|
DM_STAT_SY : in dm_stat_sy_type -- debug and monitor status - system
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_du_drv is -- display unit low level driver
|
component pdp11_du_drv is -- display unit low level driver
|
generic (
|
generic (
|
CDWIDTH : positive := 3); -- clock divider width
|
CDWIDTH : positive := 3); -- clock divider width
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
GRESET : in slbit; -- global reset
|
GRESET : in slbit; -- general reset
|
ROW0 : in slv22; -- led row 0 (22 leds, top)
|
ROW0 : in slv22; -- led row 0 (22 leds, top)
|
ROW1 : in slv16; -- led row 1 (16 leds)
|
ROW1 : in slv16; -- led row 1 (16 leds)
|
ROW2 : in slv16; -- led row 2 (16 leds)
|
ROW2 : in slv16; -- led row 2 (16 leds)
|
ROW3 : in slv10; -- led row 3 (10 leds, bottom)
|
ROW3 : in slv10; -- led row 3 (10 leds, bottom)
|
SWOPT : out slv8; -- option pattern from du
|
SWOPT : out slv8; -- option pattern from du
|
| Line 1074... |
Line 1113... |
component pdp11_bram is -- BRAM based ext. memory dummy
|
component pdp11_bram is -- BRAM based ext. memory dummy
|
generic (
|
generic (
|
AWIDTH : positive := 14); -- address width
|
AWIDTH : positive := 14); -- address width
|
port (
|
port (
|
CLK : in slbit; -- clock
|
CLK : in slbit; -- clock
|
GRESET : in slbit; -- global reset
|
GRESET : in slbit; -- general reset
|
EM_MREQ : in em_mreq_type; -- em request
|
EM_MREQ : in em_mreq_type; -- em request
|
EM_SRES : out em_sres_type -- em response
|
EM_SRES : out em_sres_type -- em response
|
);
|
);
|
end component;
|
end component;
|
|
|
| Line 1106... |
Line 1145... |
component pdp11_statleds is -- status leds
|
component pdp11_statleds is -- status leds
|
port (
|
port (
|
MEM_ACT_R : in slbit; -- memory active read
|
MEM_ACT_R : in slbit; -- memory active read
|
MEM_ACT_W : in slbit; -- memory active write
|
MEM_ACT_W : in slbit; -- memory active write
|
CP_STAT : in cp_stat_type; -- console port status
|
CP_STAT : in cp_stat_type; -- console port status
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
|
STATLEDS : out slv8 -- 8 bit CPU status
|
STATLEDS : out slv8 -- 8 bit CPU status
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_ledmux is -- hio led mux
|
component pdp11_ledmux is -- hio led mux
|
generic (
|
generic (
|
LWIDTH : positive := 8); -- led width
|
LWIDTH : positive := 8); -- led width
|
port (
|
port (
|
SEL : in slbit; -- select (0=stat;1=dr)
|
SEL : in slbit; -- select (0=stat;1=dr)
|
STATLEDS : in slv8; -- 8 bit CPU status
|
STATLEDS : in slv8; -- 8 bit CPU status
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
|
LED : out slv(LWIDTH-1 downto 0) -- hio leds
|
LED : out slv(LWIDTH-1 downto 0) -- hio leds
|
);
|
);
|
end component;
|
end component;
|
|
|
component pdp11_dspmux is -- hio dsp mux
|
component pdp11_dspmux is -- hio dsp mux
|
generic (
|
generic (
|
DCWIDTH : positive := 2); -- digit counter width (2 or 3)
|
DCWIDTH : positive := 2); -- digit counter width (2 or 3)
|
port (
|
port (
|
SEL : in slv2; -- select
|
SEL : in slv2; -- select
|
ABCLKDIV : in slv16; -- serport clock divider
|
ABCLKDIV : in slv16; -- serport clock divider
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
|
DISPREG : in slv16; -- display register
|
DISPREG : in slv16; -- display register
|
DSP_DAT : out slv(4*(2**DCWIDTH)-1 downto 0) -- display data
|
DSP_DAT : out slv(4*(2**DCWIDTH)-1 downto 0) -- display data
|
);
|
);
|
end component;
|
end component;
|
|
|
| Line 1145... |
Line 1184... |
RESET : in slbit; -- reset
|
RESET : in slbit; -- reset
|
RB_MREQ : in rb_mreq_type; -- rbus: request
|
RB_MREQ : in rb_mreq_type; -- rbus: request
|
RB_SRES : out rb_sres_type; -- rbus: response
|
RB_SRES : out rb_sres_type; -- rbus: response
|
RB_STAT : out slv4; -- rbus: status flags
|
RB_STAT : out slv4; -- rbus: status flags
|
RB_LAM : out slbit; -- remote attention
|
RB_LAM : out slbit; -- remote attention
|
CPU_RESET : out slbit; -- cpu master reset
|
GRESET : out slbit; -- general reset
|
CP_CNTL : out cp_cntl_type; -- console control port
|
CP_CNTL : out cp_cntl_type; -- console control port
|
CP_ADDR : out cp_addr_type; -- console address port
|
CP_ADDR : out cp_addr_type; -- console address port
|
CP_DIN : out slv16; -- console data in
|
CP_DIN : out slv16; -- console data in
|
CP_STAT : in cp_stat_type; -- console status port
|
CP_STAT : in cp_stat_type; -- console status port
|
CP_DOUT : in slv16 -- console data out
|
CP_DOUT : in slv16 -- console data out
|
);
|
);
|
end component;
|
end component;
|
|
|
|
component pdp11_sys70 is -- 11/70 system 1 core +rbus,debug,cache
|
|
port (
|
|
CLK : in slbit; -- clock
|
|
RESET : in slbit; -- reset
|
|
RB_MREQ : in rb_mreq_type; -- rbus request (slave)
|
|
RB_SRES : out rb_sres_type; -- rbus response
|
|
RB_STAT : out slv4; -- rbus status flags
|
|
RB_LAM_CPU : out slbit; -- rbus lam (cpu)
|
|
GRESET : out slbit; -- general reset (from rbus)
|
|
CRESET : out slbit; -- cpu reset (from cp)
|
|
BRESET : out slbit; -- bus reset (from cp or cpu)
|
|
CP_STAT : out cp_stat_type; -- console port status
|
|
EI_PRI : in slv3; -- external interrupt priority
|
|
EI_VECT : in slv9_2; -- external interrupt vector
|
|
EI_ACKM : out slbit; -- external interrupt acknowledge
|
|
ITIMER : out slbit; -- instruction timer
|
|
IB_MREQ : out ib_mreq_type; -- ibus request (master)
|
|
IB_SRES : in ib_sres_type; -- ibus response (from IO system)
|
|
MEM_REQ : out slbit; -- memory: request
|
|
MEM_WE : out slbit; -- memory: write enable
|
|
MEM_BUSY : in slbit; -- memory: controller busy
|
|
MEM_ACK_R : in slbit; -- memory: acknowledge read
|
|
MEM_ADDR : out slv20; -- memory: address
|
|
MEM_BE : out slv4; -- memory: byte enable
|
|
MEM_DI : out slv32; -- memory: data in (memory view)
|
|
MEM_DO : in slv32; -- memory: data out (memory view)
|
|
DM_STAT_DP : out dm_stat_dp_type -- debug and monitor status - dpath
|
|
);
|
|
end component;
|
|
|
|
component pdp11_hio70 is -- hio led and dsp for sys70
|
|
generic (
|
|
LWIDTH : positive := 8; -- led width
|
|
DCWIDTH : positive := 2); -- digit counter width (2 or 3)
|
|
port (
|
|
SEL_LED : in slbit; -- led select (0=stat;1=dr)
|
|
SEL_DSP : in slv2; -- dsp select
|
|
MEM_ACT_R : in slbit; -- memory active read
|
|
MEM_ACT_W : in slbit; -- memory active write
|
|
CP_STAT : in cp_stat_type; -- console port status
|
|
DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status
|
|
ABCLKDIV : in slv16; -- serport clock divider
|
|
DISPREG : in slv16; -- display register
|
|
LED : out slv(LWIDTH-1 downto 0); -- hio leds
|
|
DSP_DAT : out slv(4*(2**DCWIDTH)-1 downto 0) -- display data
|
|
);
|
|
end component;
|
|
|
-- ----- move later to pdp11_conf --------------------------------------------
|
-- ----- move later to pdp11_conf --------------------------------------------
|
|
|
constant conf_vect_pirq : integer := 8#240#;
|
constant conf_vect_pirq : integer := 8#240#;
|
constant conf_pri_pirq_1 : integer := 1;
|
constant conf_pri_pirq_1 : integer := 1;
|
constant conf_pri_pirq_2 : integer := 2;
|
constant conf_pri_pirq_2 : integer := 2;
|
