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$Id: README.txt 614 2014-12-20 15:00:45Z mueller $
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$Id: README.txt 655 2015-03-04 20:35:21Z mueller $
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Release notes for w11a
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Release notes for w11a
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Table of content:
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Table of content:
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* w11a_os_guide.txt: booting operating systems
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* w11a_os_guide.txt: booting operating systems
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* w11a_known_issues.txt: known differences, limitations and issues
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* w11a_known_issues.txt: known differences, limitations and issues
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2. Change Log ----------------------------------------------------------------
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2. Change Log ----------------------------------------------------------------
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- trunk (2015-03-01: svn rev 29(oc) 655(wfjm); untagged w11a_V0.64) +++++++++
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- Preface
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- The w11 project started on a Spartan-3 based Digilent S3board, and soon
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moved on to a Nexys2 with much better connectivity. Next step was the
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Spartan-6 based Nexys3. Now is time to continue with 7-Series FPGAs.
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- When Vivado started in 2013 it was immediately clear that the architecture
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is far superior to ISE. But tests with the first versions were sobering,
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the w11a design either didn't compile at all, or produced faulty synthesis
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results. In 2014 Vivado matured, and the current version 2014.4 works
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fine with the w11a code base.
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- The original Nexys4 board allowed to quickly port Nexys3 version because
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both have the same memory chip. The newer Nexys4 DDR will be addressed
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later.
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- The BRAM capacity of FPGAs increased significantly over time. The low
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cost Basys3 board with the second smallest Artix-7 (XC7A35T) has 200 KB
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BRAM. That allows to implement a purely BRAM based w11a system with
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176 kB memory. Not enough for 2.11BSD, but for many other less demanding
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OS available for a PDP11.
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- The Nexyx4 and Basys3 have 16 LEDs. Not quite the 'blinking lights'
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console of the classic 11/45 and 11/70, but enough to display the
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well known OS typical light patterns the veterans remember so well.
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- With a new design tool, a new FPGA generation, two new boards, and a
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new interface for the rlink connection that some of the code and tools
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base had to be re-organized.
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- Last but not least: finally access to a bit bigger disks: RL11 support
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- Many changes, some known issues, some rough edges may still lurke around
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- Summary
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- added support for Vivado
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- added support for Nexys4 and Basys3 boards
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- added RL11 disk support
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- lots of documentation updated
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- New features
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- new directory trees for
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- rtl/bplib/basys3 - support for Digilent Basys3 board
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- rtl/bplib/nexys4 - support for Digilent Nexys4 board
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- rtl/make_viv - make includes for Vivado
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- new files
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- tools/bin/xviv_ghdl_unisim - ghdl compile Vivado UNISIM & UNIMACRO libs
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- new modules
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- rtl/ibus/ibdr_rl11 - ibus controller for RL11
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- rtl/vlib/rlink/ioleds_sp1c - io activity leds for rlink+serport_1clk
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- rtl/vlib/xlib
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- s7_cmt_sfs_gsim - Series-7 CMT: simple vhdl model
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- s7_cmt_sfs_unisim - Series-7 CMT: wrapper for UNISIM
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- rtl/w11a
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- pdp11_bram_memctl - simple BRAM based memctl
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- pdp11_dspmux - mux for hio display
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- pdp11_ledmux - mux for hio leds
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- pdp11_statleds - status led generator
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- tools/src/librw11/
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- Rw11*RL11 - classes for RL11 disk handling
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- tools/src/librwxxtpp
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- RtclRw11*RL11 - tcl iface for RL11 disk handling
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- new systems
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- rtl/sys_gen/tst_rlink - rlink tester
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- basys3/sys_tst_rlink_b3 - for Basys3
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- nexys4/sys_tst_rlink_n4 - for Nexys4
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- rtl/sys_gen/tst_serloop - serport loop tester
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- nexys4/sys_tst_serloop_n4 - for Nexys4
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- rtl/sys_gen/tst_snhumanio - human I/O tester
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- basys3/sys_tst_snhumanio_b3 - for Basys3
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- nexys4/sys_tst_snhumanio_n4 - for Nexys4
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- rtl/sys_gen/w11a - w11a
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- basys3/sys_w11a_b3 - small BRAM only (176 kB memory)
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- nexys4/sys_w11a_n4 - with full 4 MB memory using cram
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- new oskits
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- tools/oskit/211bsd_rl - new oskit for 2.11BSD on RL02
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- tools/oskit/rt11-53_rl - new oskit for RT11 V5.3 on RL02
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- tools/oskit/xxdp_rl - new oskit for XXDP 22 and 25 on RL02
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- Changes
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- renames
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- ensure that old ISE and new Vivado co-exists, ensure telling names
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- rtl/make -> make_ise
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- rtl/bplib/bpgen/sn_4x7segctl -> sn_7segctl
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- tools/bin/isemsg_filter -> xise_msg_filter
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- tools/bin/xilinx_ghdl_unisim -> xise_ghdl_unisim
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- tools/bin/xilinx_ghdl_simprim -> xise_ghdl_simprim
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- retired files
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- rtl/bplib/fx2lib
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- fx2_2fifoctl_as - obsolete, wasn't actively used since long
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- tools/bin
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- set_ftdi_lat - obsolete, since kernel 2.6.32 the default is 1 ms
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- xilinx_vhdl_chop - obsolete, since ISE 11 sources come chopped
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- functional changes
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- $RETROBASE/Makefile - re-structured, many new targets
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- rtl/bplib/bpgen
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- sn_7segctl - handle also 8 digit displays
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- sn_humanio - configurable SWI and DSP width
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- sn_humanio_rbus - configurable SWI and DSP width
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- rtl/vlib/serport
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- serport_1clock - export fractional part of divider
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- rtl/ibus
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- ibdr_maxisys - add RL11 (ibdr_rl11)
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- rtl/sys_gen/w11a/*
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- sys_w11a_* - use new led and dsp control modules
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- tools/src/librlink
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- RlinkConnect - drop LogOpts, indivitual getter/setter
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- RlinkPortTerm - support custom baud rates (5M,6M,10M,12M)
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- tools/src/librtcltools
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- RtclGetList - add '?' (key list) and '*' (kv list)
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- RtclSetList - add '?' (key list)
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- RlogFile - Open(): now with cout/cerr support
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- tools/src/librlinktpp
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- RtclRlinkConnect - drop config cmd, use get/set cmd
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- RtclRlinkPort - drop config cmd, use get/set cmd
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- tools/src/librw11
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- Rw11Rdma - PreExecCB() with nwdone and nwnext
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- Rw11UnitDisk - add Nwrd2Nblk()
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- tools/src/librwxxtpp
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- RtclRw11CntlFactory - add RL11 support
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- tools/bin
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- xise_ghdl_unisim - handle also UNIMACRO lib
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- vbomconv - handle Vivado flows too
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- Bug fixes
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- tools/src/librw11
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- Rw11CntlRK11 - revise RdmaPostExecCB() logic
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- Known issues
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- V0.64-7: ghdl simulated OS boots via ti_w11 (-n4 ect options) fail due to
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a flow control issue (likely since V0.63).
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- V0.64-6: IO delays still unconstraint in vivado. All critical IOs use
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explicitly IOB flops, thus timing well defined.
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- V0.64-5: w11a_tb_guide.txt covers only ISE based tests (see also V0.64-4).
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- V0.64-4: No support for the Vivado simulator (xsim) yet. With ghdl only
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functional simulations, post synthesis (_ssim) fails to compile.
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- V0.64-3: Highest baud rate with basys3 and nexys4 is 10 MBaud. 10 MBaud
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is not supported according to FTDI, but works. 12 MBaud in next release.
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- V0.64-2: rlink throughput on basys3/nexys4 limited by serial port stack
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round trip times. Will be overcome by libusb based custom driver.
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- V0.64-1: The large default transfer size for disk accesses leads to bad
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throughput in the DL11 emulation for low speed links, like the
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460kBaud the S3board is limited too. Will be overcome by a DL11
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controller with more buffering.
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- V0.62-2: rlink v4 error recovery not yet implemented, will crash on error
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- V0.62-1: Command lists aren't split to fit in retransmit buffer size
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{last two issues not relevant for w11 backend over USB usage because
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the backend produces proper command lists and the USB channel is
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usually error free}
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- trunk (2015-01-04: svn rev 28(oc) 629(wfjm); untagged w11a_V0.63) +++++++++
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- trunk (2015-01-04: svn rev 28(oc) 629(wfjm); untagged w11a_V0.63) +++++++++
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- Summary
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- Summary
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- the w11a rbus interface used so far a narrow dynamically adjusted
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- the w11a rbus interface used so far a narrow dynamically adjusted
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rbus->ibus window. Replaces with a 4k word window for whole IO page.
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rbus->ibus window. Replaces with a 4k word window for whole IO page.
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Initial release with
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Initial release with
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- w11a CPU core
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- w11a CPU core
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- basic set of peripherals: kw11l, dl11, lp11, pc11, rk11/rk05
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- basic set of peripherals: kw11l, dl11, lp11, pc11, rk11/rk05
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- just for fun: iist (not fully implemented and tested yet)
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- just for fun: iist (not fully implemented and tested yet)
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- two complete system configurations with
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- two complete system configurations with
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- for a Digilent S3BOARD rtl/sys_gen/w11a/s3board/sys_w11a_s3
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- for a Digilent S3board rtl/sys_gen/w11a/s3board/sys_w11a_s3
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- for a Digilent Nexys2 rtl/sys_gen/w11a/nexys2/sys_w11a_n2
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- for a Digilent Nexys2 rtl/sys_gen/w11a/nexys2/sys_w11a_n2
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