| Line 1... |
Line 1... |
-- $Id: nx_cram_memctl_as.vhd 718 2015-12-26 15:59:48Z mueller $
|
-- $Id: nx_cram_memctl_as.vhd 767 2016-05-26 07:47:51Z mueller $
|
--
|
--
|
-- Copyright 2010-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
-- Copyright 2010-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
--
|
--
|
-- This program is free software; you may redistribute and/or modify it under
|
-- This program is free software; you may redistribute and/or modify it under
|
-- the terms of the GNU General Public License as published by the Free
|
-- the terms of the GNU General Public License as published by the Free
|
-- Software Foundation, either version 2, or at your option any later version.
|
-- Software Foundation, either version 2, or at your option any later version.
|
--
|
--
|
| Line 11... |
Line 11... |
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
-- for complete details.
|
-- for complete details.
|
--
|
--
|
------------------------------------------------------------------------------
|
------------------------------------------------------------------------------
|
-- Module Name: nx_cram_memctl_as - syn
|
-- Module Name: nx_cram_memctl_as - syn
|
-- Description: nexys2/3: CRAM driver - async and page mode
|
-- Description: nexys2/3/4: CRAM driver - async and page mode
|
--
|
--
|
-- Dependencies: vlib/xlib/iob_reg_o
|
-- Dependencies: vlib/xlib/iob_reg_o
|
-- vlib/xlib/iob_reg_o_gen
|
-- vlib/xlib/iob_reg_o_gen
|
-- vlib/xlib/iob_reg_io_gen
|
-- vlib/xlib/iob_reg_io_gen
|
-- Test bench: tb/tb_nx_cram_memctl_as
|
-- Test bench: tb/tb_nx_cram_memctl_as
|
-- sys_gen/tst_sram/nexys2/tb/tb_tst_sram_n2
|
-- sys_gen/tst_sram/nexys2/tb/tb_tst_sram_n2
|
-- Target Devices: generic
|
-- Target Devices: generic
|
-- Tool versions: ise 11.4-14.7; viv 2014.4; ghdl 0.26-0.31
|
-- Tool versions: ise 11.4-14.7; viv 2014.4-2016.1; ghdl 0.26-0.33
|
--
|
--
|
-- Synthesized (xst):
|
-- Synthesized (xst):
|
-- Date Rev ise Target flop lutl lutm slic t peri
|
-- Date Rev ise Target flop lutl lutm slic t peri
|
-- 2010-06-03 299 11.4 L68 xc3s1200e-4 91 100 0 96 s 6.7
|
-- 2010-06-03 299 11.4 L68 xc3s1200e-4 91 100 0 96 s 6.7
|
-- 2010-05-24 294 11.4 L68 xc3s1200e-4 91 99 0 95 s 6.7
|
-- 2010-05-24 294 11.4 L68 xc3s1200e-4 91 99 0 95 s 6.7
|
-- 2010-05-23 293 11.4 L68 xc3s1200e-4 91 139 0 99 s 6.7
|
-- 2010-05-23 293 11.4 L68 xc3s1200e-4 91 139 0 99 s 6.7
|
--
|
--
|
-- Revision History:
|
-- Revision History:
|
-- Date Rev Version Comment
|
-- Date Rev Version Comment
|
|
-- 2016-05-22 787 1.2.2 don't init N_REGS (vivado fix for fsm inference)
|
-- 2015-12-26 718 1.2.1 BUGFIX: do_dispatch(): always define imem_oe
|
-- 2015-12-26 718 1.2.1 BUGFIX: do_dispatch(): always define imem_oe
|
-- 2011-11-26 433 1.2 renamed from n2_cram_memctl_as
|
-- 2011-11-26 433 1.2 renamed from n2_cram_memctl_as
|
-- 2011-11-19 432 1.1 remove O_FLA_CE_N port
|
-- 2011-11-19 432 1.1 remove O_FLA_CE_N port
|
-- 2011-11-19 427 1.0.5 now numeric_std clean
|
-- 2011-11-19 427 1.0.5 now numeric_std clean
|
-- 2010-11-22 339 1.0.4 cntdly now 3 bit; add assert for DELAY generics
|
-- 2010-11-22 339 1.0.4 cntdly now 3 bit; add assert for DELAY generics
|
| Line 195... |
Line 196... |
'0', -- fidle
|
'0', -- fidle
|
(others=>'0'), -- memdo0
|
(others=>'0'), -- memdo0
|
(others=>'0') -- memdi
|
(others=>'0') -- memdi
|
);
|
);
|
|
|
signal R_REGS : regs_type := regs_init; -- state registers
|
signal R_REGS : regs_type := regs_init;
|
signal N_REGS : regs_type := regs_init; -- next value state regs
|
signal N_REGS : regs_type; -- don't init (vivado fix for fsm infer)
|
|
|
signal CLK_180 : slbit := '0';
|
signal CLK_180 : slbit := '0';
|
signal MEM_CE_N : slbit := '1';
|
signal MEM_CE_N : slbit := '1';
|
signal MEM_BE_N : slv2 := "11";
|
signal MEM_BE_N : slv2 := "11";
|
signal MEM_WE_N : slbit := '1';
|
signal MEM_WE_N : slbit := '1';
|
