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-- $Id: tbu_rlink_sp1c.vhd 442 2011-12-23 10:03:28Z mueller $
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-- $Id: tbu_rlink_sp1c.vhd 593 2014-09-14 22:21:33Z mueller $
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--
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--
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-- Copyright 2007-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- the terms of the GNU General Public License as published by the Free
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-- Software Foundation, either version 2, or at your option any later version.
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-- Software Foundation, either version 2, or at your option any later version.
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--
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--
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-- 2007-10-27 92 9.2.02 J39 xc3s1000-4 273 547 18 - t 9.65
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-- 2007-10-27 92 9.2.02 J39 xc3s1000-4 273 547 18 - t 9.65
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-- 2007-10-27 92 9.1 J30 xc3s1000-4 273 545 18 - t 9.65
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-- 2007-10-27 92 9.1 J30 xc3s1000-4 273 545 18 - t 9.65
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-- 2007-10-27 92 8.2.03 I34 xc3s1000-4 283 594 18 323 s 10.3
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-- 2007-10-27 92 8.2.03 I34 xc3s1000-4 283 594 18 323 s 10.3
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-- 2007-10-27 92 8.1.03 I27 xc3s1000-4 285 596 18 - s 9.32
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-- 2007-10-27 92 8.1.03 I27 xc3s1000-4 285 596 18 - s 9.32
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--
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--
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-- Tool versions: xst 8.2, 9.1, 9.2, 11.4, 12.1, 13.1; ghdl 0.18-0.29
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-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
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--
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--
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-- Revision History:
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-- Revision History:
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-- Date Rev Version Comment
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-- Date Rev Version Comment
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-- 2014-08-31 590 4.0 now full rlink v4 iface, 4 bit STAT
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-- 2014-08-15 583 3.5 rb_mreq addr now 16 bit
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-- 2011-12-22 442 3.2 renamed and retargeted to test rlink_sp1c
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-- 2011-12-22 442 3.2 renamed and retargeted to test rlink_sp1c
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-- 2011-11-19 427 3.1.2 now numeric_std clean
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-- 2011-11-19 427 3.1.2 now numeric_std clean
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-- 2010-12-28 350 3.1.1 use CLKDIV/CDINIT=0;
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-- 2010-12-28 350 3.1.1 use CLKDIV/CDINIT=0;
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-- 2010-12-26 348 3.1 use rlink_base now; add RTS/CTS ports
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-- 2010-12-26 348 3.1 use rlink_base now; add RTS/CTS ports
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-- 2010-12-24 347 3.0.1 rename: CP_*->RL->*
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-- 2010-12-24 347 3.0.1 rename: CP_*->RL->*
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RTS_N : out slbit; -- request to send (act.low, board view)
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RTS_N : out slbit; -- request to send (act.low, board view)
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RB_MREQ_aval : out slbit; -- rbus: request - aval
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RB_MREQ_aval : out slbit; -- rbus: request - aval
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RB_MREQ_re : out slbit; -- rbus: request - re
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RB_MREQ_re : out slbit; -- rbus: request - re
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RB_MREQ_we : out slbit; -- rbus: request - we
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RB_MREQ_we : out slbit; -- rbus: request - we
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RB_MREQ_initt: out slbit; -- rbus: request - init; avoid name coll
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RB_MREQ_initt: out slbit; -- rbus: request - init; avoid name coll
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RB_MREQ_addr : out slv8; -- rbus: request - addr
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RB_MREQ_addr : out slv16; -- rbus: request - addr
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RB_MREQ_din : out slv16; -- rbus: request - din
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RB_MREQ_din : out slv16; -- rbus: request - din
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RB_SRES_ack : in slbit; -- rbus: response - ack
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RB_SRES_ack : in slbit; -- rbus: response - ack
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RB_SRES_busy : in slbit; -- rbus: response - busy
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RB_SRES_busy : in slbit; -- rbus: response - busy
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RB_SRES_err : in slbit; -- rbus: response - err
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RB_SRES_err : in slbit; -- rbus: response - err
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RB_SRES_dout : in slv16; -- rbus: response - dout
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RB_SRES_dout : in slv16; -- rbus: response - dout
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RB_LAM : in slv16; -- rbus: look at me
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RB_LAM : in slv16; -- rbus: look at me
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RB_STAT : in slv3 -- rbus: status flags
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RB_STAT : in slv4 -- rbus: status flags
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);
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);
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end entity tbu_rlink_sp1c;
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end entity tbu_rlink_sp1c;
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architecture syn of tbu_rlink_sp1c is
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architecture syn of tbu_rlink_sp1c is
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RB_SRES.err <= RB_SRES_err;
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RB_SRES.err <= RB_SRES_err;
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RB_SRES.dout <= RB_SRES_dout;
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RB_SRES.dout <= RB_SRES_dout;
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RLINK : rlink_sp1c
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RLINK : rlink_sp1c
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generic map (
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generic map (
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ATOWIDTH => 5,
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BTOWIDTH => 5,
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ITOWIDTH => 6,
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RTAWIDTH => 11,
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CPREF => c_rlink_cpref,
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SYSID => x"76543210",
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IFAWIDTH => 5,
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IFAWIDTH => 5,
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OFAWIDTH => 5,
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OFAWIDTH => 5,
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ENAPIN_RLMON => -1, -- no monitors (both are instantiated in
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ENAPIN_RLMON => sbcntl_sbf_rlmon,
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ENAPIN_RBMON => -1, -- tbd_rlink_sp1c for ssim avail.)
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ENAPIN_RLBMON=> sbcntl_sbf_rlbmon,
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ENAPIN_RBMON => sbcntl_sbf_rbmon,
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CDWIDTH => 15,
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CDWIDTH => 15,
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CDINIT => c_cdinit)
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CDINIT => c_cdinit)
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port map (
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port map (
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CLK => CLK,
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CLK => CLK,
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CE_USEC => CE_USEC,
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CE_USEC => CE_USEC,
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