| Line 1... |
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// $Id: Rw11Cpu.cpp 632 2015-01-11 12:30:03Z mueller $
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// $Id: Rw11Cpu.cpp 675 2015-05-08 21:05:08Z mueller $
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//
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//
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// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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// Copyright 2013-2015 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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//
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//
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// This program is free software; you may redistribute and/or modify it under
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// This program is free software; you may redistribute and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation, either version 2, or at your option any later version.
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// Software Foundation, either version 2, or at your option any later version.
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//
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//
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| Line 11... |
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// or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for complete details.
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// for complete details.
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//
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//
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// Revision History:
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// Revision History:
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// Date Rev Version Comment
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// Date Rev Version Comment
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// 2015-05-08 675 1.2.3 w11a start/stop/suspend overhaul
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// 2015-04-25 668 1.2.2 add AddRbibr(), AddWbibr()
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// 2015-04-03 661 1.2.1 add kStat_M_* defs
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// 2015-03-21 659 1.2 add RAddrMap
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// 2015-01-01 626 1.1 Adopt for rlink v4 and 4k ibus window
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// 2015-01-01 626 1.1 Adopt for rlink v4 and 4k ibus window
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// 2014-12-21 617 1.0.3 use kStat_M_RbTout for rbus timeout
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// 2014-12-21 617 1.0.3 use kStat_M_RbTout for rbus timeout
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// 2014-08-02 576 1.0.2 adopt rename of LastExpect->SetLastExpect
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// 2014-08-02 576 1.0.2 adopt rename of LastExpect->SetLastExpect
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// 2013-04-14 506 1.0.1 add AddLalh(),AddRMem(),AddWMem()
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// 2013-04-14 506 1.0.1 add AddLalh(),AddRMem(),AddWMem()
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// 2013-04-12 504 1.0 Initial version
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// 2013-04-12 504 1.0 Initial version
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// 2013-01-27 478 0.1 First draft
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// 2013-01-27 478 0.1 First draft
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// ---------------------------------------------------------------------------
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// ---------------------------------------------------------------------------
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|
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/*!
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/*!
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\file
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\file
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\version $Id: Rw11Cpu.cpp 632 2015-01-11 12:30:03Z mueller $
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\version $Id: Rw11Cpu.cpp 675 2015-05-08 21:05:08Z mueller $
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\brief Implemenation of Rw11Cpu.
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\brief Implemenation of Rw11Cpu.
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*/
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*/
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#include <stdlib.h>
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#include <stdlib.h>
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#include <fcntl.h>
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#include <fcntl.h>
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#include <errno.h>
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#include <errno.h>
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| Line 56... |
Line 60... |
namespace Retro {
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namespace Retro {
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|
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//------------------------------------------+-----------------------------------
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//------------------------------------------+-----------------------------------
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// constants definitions
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// constants definitions
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|
|
const uint16_t Rw11Cpu::kCp_addr_conf;
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const uint16_t Rw11Cpu::kCPCONF;
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const uint16_t Rw11Cpu::kCp_addr_cntl;
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const uint16_t Rw11Cpu::kCPCNTL;
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const uint16_t Rw11Cpu::kCp_addr_stat;
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const uint16_t Rw11Cpu::kCPSTAT;
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const uint16_t Rw11Cpu::kCp_addr_psw;
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const uint16_t Rw11Cpu::kCPPSW;
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const uint16_t Rw11Cpu::kCp_addr_al;
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const uint16_t Rw11Cpu::kCPAL;
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const uint16_t Rw11Cpu::kCp_addr_ah;
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const uint16_t Rw11Cpu::kCPAH;
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const uint16_t Rw11Cpu::kCp_addr_mem;
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const uint16_t Rw11Cpu::kCPMEM;
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const uint16_t Rw11Cpu::kCp_addr_memi;
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const uint16_t Rw11Cpu::kCPMEMI;
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const uint16_t Rw11Cpu::kCp_addr_r0;
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const uint16_t Rw11Cpu::kCPR0;
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const uint16_t Rw11Cpu::kCp_addr_pc;
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const uint16_t Rw11Cpu::kCPPC;
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const uint16_t Rw11Cpu::kCp_addr_membe;
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const uint16_t Rw11Cpu::kCPMEMBE;
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|
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const uint16_t Rw11Cpu::kCp_func_noop;
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const uint16_t Rw11Cpu::kCPFUNC_NOOP;
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const uint16_t Rw11Cpu::kCp_func_start;
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const uint16_t Rw11Cpu::kCPFUNC_START;
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const uint16_t Rw11Cpu::kCp_func_stop;
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const uint16_t Rw11Cpu::kCPFUNC_STOP;
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const uint16_t Rw11Cpu::kCp_func_cont;
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const uint16_t Rw11Cpu::kCPFUNC_STEP;
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const uint16_t Rw11Cpu::kCp_func_step;
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const uint16_t Rw11Cpu::kCPFUNC_CRESET;
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const uint16_t Rw11Cpu::kCp_func_reset;
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const uint16_t Rw11Cpu::kCPFUNC_BRESET;
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const uint16_t Rw11Cpu::kCPFUNC_SUSPEND;
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const uint16_t Rw11Cpu::kCp_stat_m_cpurust;
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const uint16_t Rw11Cpu::kCPFUNC_RESUME;
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const uint16_t Rw11Cpu::kCp_stat_v_cpurust;
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const uint16_t Rw11Cpu::kCp_stat_b_cpurust;
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const uint16_t Rw11Cpu::kCPSTAT_M_SuspExt;
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const uint16_t Rw11Cpu::kCp_stat_m_cpuhalt;
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const uint16_t Rw11Cpu::kCPSTAT_M_SuspInt;
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const uint16_t Rw11Cpu::kCp_stat_m_cpugo;
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const uint16_t Rw11Cpu::kCPSTAT_M_CpuRust;
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const uint16_t Rw11Cpu::kCp_stat_m_cmdmerr;
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const uint16_t Rw11Cpu::kCPSTAT_V_CpuRust;
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const uint16_t Rw11Cpu::kCp_stat_m_cmderr;
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const uint16_t Rw11Cpu::kCPSTAT_B_CpuRust;
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const uint16_t Rw11Cpu::kCPSTAT_M_CpuSusp;
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const uint16_t Rw11Cpu::kCp_cpurust_init;
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const uint16_t Rw11Cpu::kCPSTAT_M_CpuGo;
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const uint16_t Rw11Cpu::kCp_cpurust_halt;
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const uint16_t Rw11Cpu::kCPSTAT_M_CmdMErr;
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const uint16_t Rw11Cpu::kCp_cpurust_reset;
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const uint16_t Rw11Cpu::kCPSTAT_M_CmdErr;
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const uint16_t Rw11Cpu::kCp_cpurust_stop;
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const uint16_t Rw11Cpu::kCp_cpurust_step;
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const uint16_t Rw11Cpu::kCPURUST_INIT;
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const uint16_t Rw11Cpu::kCp_cpurust_susp;
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const uint16_t Rw11Cpu::kCPURUST_HALT;
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const uint16_t Rw11Cpu::kCp_cpurust_runs;
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const uint16_t Rw11Cpu::kCPURUST_RESET;
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const uint16_t Rw11Cpu::kCp_cpurust_vecfet;
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const uint16_t Rw11Cpu::kCPURUST_STOP;
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const uint16_t Rw11Cpu::kCp_cpurust_recrsv;
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const uint16_t Rw11Cpu::kCPURUST_STEP;
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const uint16_t Rw11Cpu::kCp_cpurust_sfail;
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const uint16_t Rw11Cpu::kCPURUST_SUSP;
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const uint16_t Rw11Cpu::kCp_cpurust_vfail;
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const uint16_t Rw11Cpu::kCPURUST_RUNS;
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const uint16_t Rw11Cpu::kCPURUST_VECFET;
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const uint16_t Rw11Cpu::kCp_ah_m_addr;
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const uint16_t Rw11Cpu::kCPURUST_RECRSV;
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const uint16_t Rw11Cpu::kCp_ah_m_22bit;
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const uint16_t Rw11Cpu::kCPURUST_SFAIL;
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const uint16_t Rw11Cpu::kCp_ah_m_ubmap;
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const uint16_t Rw11Cpu::kCPURUST_VFAIL;
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|
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const uint16_t Rw11Cpu::kCp_membe_m_stick;
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const uint16_t Rw11Cpu::kCPAH_M_ADDR;
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const uint16_t Rw11Cpu::kCp_membe_m_be;
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const uint16_t Rw11Cpu::kCPAH_M_22BIT;
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const uint16_t Rw11Cpu::kCPAH_M_UBMAP;
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|
|
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const uint16_t Rw11Cpu::kCPMEMBE_M_STICK;
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const uint16_t Rw11Cpu::kCPMEMBE_M_BE;
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|
|
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const uint8_t Rw11Cpu::kStat_M_CmdErr;
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const uint8_t Rw11Cpu::kStat_M_CmdMErr;
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const uint8_t Rw11Cpu::kStat_M_CpuHalt;
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const uint8_t Rw11Cpu::kStat_M_CpuGo;
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|
|
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
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//! Constructor
|
//! Constructor
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|
|
Rw11Cpu::Rw11Cpu(const std::string& type)
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Rw11Cpu::Rw11Cpu(const std::string& type)
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| Line 118... |
Line 130... |
fCpuStat(0),
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fCpuStat(0),
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fCpuGoMutex(),
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fCpuGoMutex(),
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fCpuGoCond(),
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fCpuGoCond(),
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fCntlMap(),
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fCntlMap(),
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fIAddrMap(),
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fIAddrMap(),
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fRAddrMap(),
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fStats()
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fStats()
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{}
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{}
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|
|
//------------------------------------------+-----------------------------------
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//------------------------------------------+-----------------------------------
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//! Destructor
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//! Destructor
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| Line 134... |
Line 147... |
|
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void Rw11Cpu::Setup(Rw11* pw11)
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void Rw11Cpu::Setup(Rw11* pw11)
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{
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{
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fpW11 = pw11;
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fpW11 = pw11;
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// add control port address rbus mappings
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// add control port address rbus mappings
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// name base: 'cn.', where n is cpu index
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AllRAddrMapInsert("conf" , Base()+kCPCONF);
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string cbase = "c";
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AllRAddrMapInsert("cntl" , Base()+kCPCNTL);
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cbase += '0'+Index();
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AllRAddrMapInsert("stat" , Base()+kCPSTAT);
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cbase += '.';
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AllRAddrMapInsert("psw" , Base()+kCPPSW);
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Connect().AddrMapInsert(cbase+"conf", Base()+kCp_addr_conf);
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AllRAddrMapInsert("al" , Base()+kCPAL);
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Connect().AddrMapInsert(cbase+"cntl", Base()+kCp_addr_cntl);
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AllRAddrMapInsert("ah" , Base()+kCPAH);
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Connect().AddrMapInsert(cbase+"stat", Base()+kCp_addr_stat);
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AllRAddrMapInsert("mem" , Base()+kCPMEM);
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Connect().AddrMapInsert(cbase+"psw" , Base()+kCp_addr_psw);
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AllRAddrMapInsert("memi" , Base()+kCPMEMI);
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Connect().AddrMapInsert(cbase+"al" , Base()+kCp_addr_al);
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AllRAddrMapInsert("r0" , Base()+kCPR0);
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Connect().AddrMapInsert(cbase+"ah" , Base()+kCp_addr_ah);
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AllRAddrMapInsert("r1" , Base()+kCPR0+1);
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Connect().AddrMapInsert(cbase+"mem" , Base()+kCp_addr_mem);
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AllRAddrMapInsert("r2" , Base()+kCPR0+2);
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Connect().AddrMapInsert(cbase+"memi", Base()+kCp_addr_memi);
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AllRAddrMapInsert("r3" , Base()+kCPR0+3);
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Connect().AddrMapInsert(cbase+"r0" , Base()+kCp_addr_r0);
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AllRAddrMapInsert("r4" , Base()+kCPR0+4);
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Connect().AddrMapInsert(cbase+"r1" , Base()+kCp_addr_r0+1);
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AllRAddrMapInsert("r5" , Base()+kCPR0+5);
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Connect().AddrMapInsert(cbase+"r2" , Base()+kCp_addr_r0+2);
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AllRAddrMapInsert("sp" , Base()+kCPR0+6);
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Connect().AddrMapInsert(cbase+"r3" , Base()+kCp_addr_r0+3);
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AllRAddrMapInsert("pc" , Base()+kCPR0+7);
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Connect().AddrMapInsert(cbase+"r4" , Base()+kCp_addr_r0+4);
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AllRAddrMapInsert("membe",Base()+kCPMEMBE);
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Connect().AddrMapInsert(cbase+"r5" , Base()+kCp_addr_r0+5);
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Connect().AddrMapInsert(cbase+"sp" , Base()+kCp_addr_r0+6);
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Connect().AddrMapInsert(cbase+"pc" , Base()+kCp_addr_r0+7);
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Connect().AddrMapInsert(cbase+"membe",Base()+kCp_addr_membe);
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|
|
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// add cpu register address ibus and rbus mappings
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// add cpu register address ibus and rbus mappings
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AllAddrMapInsert("psw" , 0177776);
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AllIAddrMapInsert("psw" , 0177776);
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AllAddrMapInsert("stklim" , 0177774);
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AllIAddrMapInsert("stklim" , 0177774);
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AllAddrMapInsert("pirq" , 0177772);
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AllIAddrMapInsert("pirq" , 0177772);
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AllAddrMapInsert("mbrk" , 0177770);
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AllIAddrMapInsert("mbrk" , 0177770);
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AllAddrMapInsert("cpuerr" , 0177766);
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AllIAddrMapInsert("cpuerr" , 0177766);
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AllAddrMapInsert("sysid" , 0177764);
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AllIAddrMapInsert("sysid" , 0177764);
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AllAddrMapInsert("hisize" , 0177762);
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AllIAddrMapInsert("hisize" , 0177762);
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AllAddrMapInsert("losize" , 0177760);
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AllIAddrMapInsert("losize" , 0177760);
|
|
|
AllAddrMapInsert("hm" , 0177752);
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AllIAddrMapInsert("hm" , 0177752);
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AllAddrMapInsert("maint" , 0177750);
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AllIAddrMapInsert("maint" , 0177750);
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AllAddrMapInsert("cntrl" , 0177746);
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AllIAddrMapInsert("cntrl" , 0177746);
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AllAddrMapInsert("syserr" , 0177744);
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AllIAddrMapInsert("syserr" , 0177744);
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AllAddrMapInsert("hiaddr" , 0177742);
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AllIAddrMapInsert("hiaddr" , 0177742);
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AllAddrMapInsert("loaddr" , 0177740);
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AllIAddrMapInsert("loaddr" , 0177740);
|
|
|
AllAddrMapInsert("ssr2" , 0177576);
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AllIAddrMapInsert("ssr2" , 0177576);
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AllAddrMapInsert("ssr1" , 0177574);
|
AllIAddrMapInsert("ssr1" , 0177574);
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AllAddrMapInsert("ssr0" , 0177572);
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AllIAddrMapInsert("ssr0" , 0177572);
|
|
|
AllAddrMapInsert("sdreg" , 0177570);
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AllIAddrMapInsert("sdreg" , 0177570);
|
|
|
AllAddrMapInsert("ssr3" , 0172516);
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AllIAddrMapInsert("ssr3" , 0172516);
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|
|
// add mmu segment register files
|
// add mmu segment register files
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string sdr = "sdr";
|
string sdr = "sdr";
|
string sar = "sar";
|
string sar = "sar";
|
for (char i=0; i<8; i++) {
|
for (char i=0; i<8; i++) {
|
char ichar = '0'+i;
|
char ichar = '0'+i;
|
AllAddrMapInsert(sdr+"ki."+ichar, 0172300+2*i);
|
AllIAddrMapInsert(sdr+"ki."+ichar, 0172300+2*i);
|
AllAddrMapInsert(sdr+"kd."+ichar, 0172320+2*i);
|
AllIAddrMapInsert(sdr+"kd."+ichar, 0172320+2*i);
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AllAddrMapInsert(sar+"ki."+ichar, 0172340+2*i);
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AllIAddrMapInsert(sar+"ki."+ichar, 0172340+2*i);
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AllAddrMapInsert(sar+"kd."+ichar, 0172360+2*i);
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AllIAddrMapInsert(sar+"kd."+ichar, 0172360+2*i);
|
AllAddrMapInsert(sdr+"si."+ichar, 0172200+2*i);
|
AllIAddrMapInsert(sdr+"si."+ichar, 0172200+2*i);
|
AllAddrMapInsert(sdr+"sd."+ichar, 0172220+2*i);
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AllIAddrMapInsert(sdr+"sd."+ichar, 0172220+2*i);
|
AllAddrMapInsert(sar+"si."+ichar, 0172240+2*i);
|
AllIAddrMapInsert(sar+"si."+ichar, 0172240+2*i);
|
AllAddrMapInsert(sar+"sd."+ichar, 0172260+2*i);
|
AllIAddrMapInsert(sar+"sd."+ichar, 0172260+2*i);
|
AllAddrMapInsert(sdr+"ui."+ichar, 0177600+2*i);
|
AllIAddrMapInsert(sdr+"ui."+ichar, 0177600+2*i);
|
AllAddrMapInsert(sdr+"ud."+ichar, 0177620+2*i);
|
AllIAddrMapInsert(sdr+"ud."+ichar, 0177620+2*i);
|
AllAddrMapInsert(sar+"ui."+ichar, 0177640+2*i);
|
AllIAddrMapInsert(sar+"ui."+ichar, 0177640+2*i);
|
AllAddrMapInsert(sar+"ud."+ichar, 0177660+2*i);
|
AllIAddrMapInsert(sar+"ud."+ichar, 0177660+2*i);
|
}
|
}
|
|
|
return;
|
return;
|
}
|
}
|
|
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| Line 287... |
Line 296... |
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
|
//! FIXME_docs
|
//! FIXME_docs
|
|
|
int Rw11Cpu::AddMembe(RlinkCommandList& clist, uint16_t be, bool stick)
|
int Rw11Cpu::AddMembe(RlinkCommandList& clist, uint16_t be, bool stick)
|
{
|
{
|
uint16_t data = be & kCp_membe_m_be;
|
uint16_t data = be & kCPMEMBE_M_BE;
|
if (stick) data |= kCp_membe_m_stick;
|
if (stick) data |= kCPMEMBE_M_STICK;
|
return clist.AddWreg(fBase+kCp_addr_membe, data);
|
return clist.AddWreg(fBase+kCPMEMBE, data);
|
}
|
}
|
|
|
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
|
//! FIXME_docs
|
//! FIXME_docs
|
|
|
| Line 316... |
Line 325... |
return clist.AddWreg(IbusRemoteAddr(ibaddr), data);
|
return clist.AddWreg(IbusRemoteAddr(ibaddr), data);
|
}
|
}
|
|
|
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
|
//! FIXME_docs
|
//! FIXME_docs
|
|
int Rw11Cpu::AddRbibr(RlinkCommandList& clist, uint16_t ibaddr, size_t size)
|
|
{
|
|
if ((ibaddr & 0160001) != 0160000)
|
|
throw Rexception("Rw11Cpu::AddRbibr", "ibaddr out of IO page or odd");
|
|
|
|
return clist.AddRblk(IbusRemoteAddr(ibaddr), size);
|
|
}
|
|
|
|
//------------------------------------------+-----------------------------------
|
|
//! FIXME_docs
|
|
int Rw11Cpu::AddWbibr(RlinkCommandList& clist, uint16_t ibaddr,
|
|
std::vector<uint16_t> block)
|
|
{
|
|
if ((ibaddr & 0160001) != 0160000)
|
|
throw Rexception("Rw11Cpu::AddWbibr", "ibaddr out of IO page or odd");
|
|
|
|
return clist.AddWblk(IbusRemoteAddr(ibaddr), block);
|
|
}
|
|
|
|
//------------------------------------------+-----------------------------------
|
|
//! FIXME_docs
|
|
|
int Rw11Cpu::AddLalh(RlinkCommandList& clist, uint32_t addr, uint16_t mode)
|
int Rw11Cpu::AddLalh(RlinkCommandList& clist, uint32_t addr, uint16_t mode)
|
{
|
{
|
uint16_t al = uint16_t(addr);
|
uint16_t al = uint16_t(addr);
|
uint16_t ah = uint16_t(addr>>16) & kCp_ah_m_addr;
|
uint16_t ah = uint16_t(addr>>16) & kCPAH_M_ADDR;
|
ah |= mode & (kCp_ah_m_22bit|kCp_ah_m_ubmap);
|
ah |= mode & (kCPAH_M_22BIT|kCPAH_M_UBMAP);
|
int ind = clist.AddWreg(fBase+kCp_addr_al, al);
|
int ind = clist.AddWreg(fBase+kCPAL, al);
|
clist.AddWreg(fBase+kCp_addr_ah, ah);
|
clist.AddWreg(fBase+kCPAH, ah);
|
return ind;
|
return ind;
|
}
|
}
|
|
|
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
|
//! FIXME_docs
|
//! FIXME_docs
|
| Line 341... |
Line 371... |
"Bad args: singleblk==true && size > BlockSizeMax()");
|
"Bad args: singleblk==true && size > BlockSizeMax()");
|
|
|
int ind = AddLalh(clist, addr, mode);
|
int ind = AddLalh(clist, addr, mode);
|
while (size > 0) {
|
while (size > 0) {
|
size_t bsize = (size>blkmax) ? blkmax : size;
|
size_t bsize = (size>blkmax) ? blkmax : size;
|
clist.AddRblk(fBase+kCp_addr_memi, buf, bsize);
|
clist.AddRblk(fBase+kCPMEMI, buf, bsize);
|
buf += bsize;
|
buf += bsize;
|
size -= bsize;
|
size -= bsize;
|
}
|
}
|
return ind;
|
return ind;
|
}
|
}
|
| Line 363... |
Line 393... |
"Bad args: singleblk==true && size > BlockSizeMax()");
|
"Bad args: singleblk==true && size > BlockSizeMax()");
|
|
|
int ind = AddLalh(clist, addr, mode);
|
int ind = AddLalh(clist, addr, mode);
|
while (size > 0) {
|
while (size > 0) {
|
size_t bsize = (size>blkmax) ? blkmax : size;
|
size_t bsize = (size>blkmax) ? blkmax : size;
|
clist.AddWblk(fBase+kCp_addr_memi, buf, bsize);
|
clist.AddWblk(fBase+kCPMEMI, buf, bsize);
|
buf += bsize;
|
buf += bsize;
|
size -= bsize;
|
size -= bsize;
|
}
|
}
|
return ind;
|
return ind;
|
}
|
}
|
| Line 382... |
Line 412... |
data.resize(nword);
|
data.resize(nword);
|
size_t ndone = 0;
|
size_t ndone = 0;
|
while (nword>ndone) {
|
while (nword>ndone) {
|
size_t nblk = min(blkmax, nword-ndone);
|
size_t nblk = min(blkmax, nword-ndone);
|
RlinkCommandList clist;
|
RlinkCommandList clist;
|
clist.AddWreg(fBase+kCp_addr_al, addr+2*ndone);
|
clist.AddWreg(fBase+kCPAL, addr+2*ndone);
|
clist.AddRblk(fBase+kCp_addr_memi, data.data()+ndone, nblk);
|
clist.AddRblk(fBase+kCPMEMI, data.data()+ndone, nblk);
|
if (!Server().Exec(clist, emsg)) return false;
|
if (!Server().Exec(clist, emsg)) return false;
|
ndone += nblk;
|
ndone += nblk;
|
}
|
}
|
return true;
|
return true;
|
}
|
}
|
| Line 402... |
Line 432... |
size_t nword = data.size();
|
size_t nword = data.size();
|
size_t ndone = 0;
|
size_t ndone = 0;
|
while (nword>ndone) {
|
while (nword>ndone) {
|
size_t nblk = min(blkmax, nword-ndone);
|
size_t nblk = min(blkmax, nword-ndone);
|
RlinkCommandList clist;
|
RlinkCommandList clist;
|
clist.AddWreg(fBase+kCp_addr_al, addr+2*ndone);
|
clist.AddWreg(fBase+kCPAL, addr+2*ndone);
|
clist.AddWblk(fBase+kCp_addr_memi, data.data()+ndone, nblk);
|
clist.AddWblk(fBase+kCPMEMI, data.data()+ndone, nblk);
|
if (!Server().Exec(clist, emsg)) return false;
|
if (!Server().Exec(clist, emsg)) return false;
|
ndone += nblk;
|
ndone += nblk;
|
}
|
}
|
return true;
|
return true;
|
}
|
}
|
| Line 424... |
Line 454... |
if (!dsc.fProbeDone) {
|
if (!dsc.fProbeDone) {
|
RlinkCommandList clist;
|
RlinkCommandList clist;
|
int iib = -1;
|
int iib = -1;
|
int irb = -1;
|
int irb = -1;
|
if (dsc.fProbeInt) {
|
if (dsc.fProbeInt) {
|
clist.AddWreg(fBase+kCp_addr_al, dsc.fAddr);
|
clist.AddWreg(fBase+kCPAL, dsc.fAddr);
|
iib = clist.AddRreg(fBase+kCp_addr_mem);
|
iib = clist.AddRreg(fBase+kCPMEM);
|
clist.SetLastExpect(new RlinkCommandExpect(0,0xff)); // disable stat check
|
clist.SetLastExpectStatus(0,0); // disable stat check
|
}
|
}
|
if (dsc.fProbeRem) {
|
if (dsc.fProbeRem) {
|
irb = AddRibr(clist, dsc.fAddr);
|
irb = AddRibr(clist, dsc.fAddr);
|
clist.SetLastExpect(new RlinkCommandExpect(0,0xff)); // disable stat check
|
clist.SetLastExpectStatus(0,0); // disable stat check
|
}
|
}
|
|
|
Server().Exec(clist);
|
Server().Exec(clist);
|
|
|
if (dsc.fProbeInt) {
|
if (dsc.fProbeInt) {
|
| Line 676... |
Line 706... |
}
|
}
|
|
|
if (!MemWrite(aload, code, emsg)) return false;
|
if (!MemWrite(aload, code, emsg)) return false;
|
|
|
RlinkCommandList clist;
|
RlinkCommandList clist;
|
clist.AddWreg(fBase+kCp_addr_pc, astart);
|
clist.AddWreg(fBase+kCPCNTL, kCPFUNC_STOP); // stop, just in case
|
clist.AddWreg(fBase+kCp_addr_cntl, kCp_func_start);
|
clist.AddWreg(fBase+kCPCNTL, kCPFUNC_CRESET); // init cpu and bus
|
|
clist.AddWreg(fBase+kCPPC, astart); // load PC
|
|
clist.AddWreg(fBase+kCPCNTL, kCPFUNC_START); // and start
|
SetCpuGoUp();
|
SetCpuGoUp();
|
if (!Server().Exec(clist, emsg)) return false;
|
if (!Server().Exec(clist, emsg)) return false;
|
|
|
return true;
|
return true;
|
}
|
}
|
| Line 701... |
Line 733... |
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
|
//! FIXME_docs
|
//! FIXME_docs
|
|
|
void Rw11Cpu::SetCpuGoDown(uint16_t stat)
|
void Rw11Cpu::SetCpuGoDown(uint16_t stat)
|
{
|
{
|
if ((stat & kCp_stat_m_cpugo) == 0) {
|
if ((stat & kCPSTAT_M_CpuGo) == 0) {
|
boost::lock_guard<boost::mutex> lock(fCpuGoMutex);
|
boost::lock_guard<boost::mutex> lock(fCpuGoMutex);
|
fCpuGo = false;
|
fCpuGo = false;
|
fCpuStat = stat;
|
fCpuStat = stat;
|
fCpuGoCond.notify_all();
|
fCpuGoCond.notify_all();
|
}
|
}
|
| Line 730... |
Line 762... |
}
|
}
|
|
|
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
|
//! FIXME_docs
|
//! FIXME_docs
|
|
|
void Rw11Cpu::AllAddrMapInsert(const std::string& name, uint16_t ibaddr)
|
void Rw11Cpu::AllIAddrMapInsert(const std::string& name, uint16_t ibaddr)
|
{
|
{
|
string rbname = "i";
|
|
rbname += '0'+Index();
|
|
rbname += '.';
|
|
rbname += name;
|
|
Connect().AddrMapInsert(rbname, IbusRemoteAddr(ibaddr));
|
|
IAddrMapInsert(name, ibaddr);
|
IAddrMapInsert(name, ibaddr);
|
|
uint16_t rbaddr = IbusRemoteAddr(ibaddr);
|
|
RAddrMapInsert(name, rbaddr);
|
|
|
|
// add ix. to name in common Connect AddrMap to keep name unique
|
|
string cname = "i";
|
|
cname += '0'+Index();
|
|
cname += '.';
|
|
cname += name;
|
|
Connect().AddrMapInsert(cname, rbaddr);
|
|
|
|
return;
|
|
}
|
|
|
|
//------------------------------------------+-----------------------------------
|
|
//! FIXME_docs
|
|
|
|
void Rw11Cpu::AllRAddrMapInsert(const std::string& name, uint16_t rbaddr)
|
|
{
|
|
RAddrMapInsert(name, rbaddr);
|
|
|
|
// add cx. to name in common Connect AddrMap to keep name unique
|
|
string cname = "c";
|
|
cname += '0'+Index();
|
|
cname += '.';
|
|
cname += name;
|
|
Connect().AddrMapInsert(cname, rbaddr);
|
|
|
return;
|
return;
|
}
|
}
|
|
|
//------------------------------------------+-----------------------------------
|
//------------------------------------------+-----------------------------------
|
//! FIXME_docs
|
//! FIXME_docs
|
|
|
void Rw11Cpu::W11AttnHandler()
|
void Rw11Cpu::W11AttnHandler()
|
{
|
{
|
RlinkCommandList clist;
|
RlinkCommandList clist;
|
clist.AddRreg(fBase+kCp_addr_stat);
|
clist.AddRreg(fBase+kCPSTAT);
|
Server().Exec(clist);
|
Server().Exec(clist);
|
SetCpuGoDown(clist[0].Data());
|
SetCpuGoDown(clist[0].Data());
|
return;
|
return;
|
}
|
}
|
|
|
| Line 774... |
Line 828... |
for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {
|
for (cmap_cit_t it=fCntlMap.begin(); it!=fCntlMap.end(); it++) {
|
os << bl << " " << RosPrintf((it->first).c_str(), "-s",8)
|
os << bl << " " << RosPrintf((it->first).c_str(), "-s",8)
|
<< " : " << it->second << endl;
|
<< " : " << it->second << endl;
|
}
|
}
|
fIAddrMap.Dump(os, ind+2, "fIAddrMap: ");
|
fIAddrMap.Dump(os, ind+2, "fIAddrMap: ");
|
|
fRAddrMap.Dump(os, ind+2, "fRAddrMap: ");
|
fStats.Dump(os, ind+2, "fStats: ");
|
fStats.Dump(os, ind+2, "fStats: ");
|
return;
|
return;
|
}
|
}
|
|
|
} // end namespace Retro
|
} // end namespace Retro
|
