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[/] [wb4pb/] [trunk/] [impl/] [avnet_sp3a_eval_gpio_vlog.v] - Diff between revs 24 and 28
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| Rev 24 |
Rev 28 |
| Line 104... |
Line 104... |
wire[7:0] gpio_oe;
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wire[7:0] gpio_oe;
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reg[23:0] timer;
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reg[23:0] timer;
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// reset synchronisation
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// reset synchronisation
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always@(clk)
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always@(posedge clk)
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rst <= FPGA_RESET;
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rst <= FPGA_RESET;
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assign clk = CLK_16MHZ;
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assign clk = CLK_16MHZ;
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// module instances
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// module instances
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///////////////////
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///////////////////
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