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https://opencores.org/ocsvn/wb4pb/wb4pb/trunk
[/] [wb4pb/] [trunk/] [impl/] [avnet_sp3a_eval_uart_vhd.vhd] - Diff between revs 24 and 28
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| Rev 24 |
Rev 28 |
| Line 202... |
Line 202... |
PSDONE => open,
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PSDONE => open,
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STATUS => open
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STATUS => open
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);
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);
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-- reset synchronisation
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-- reset synchronisation
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process(clk)
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process(dcm_locked, clk)
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begin
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begin
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if dcm_locked = '0' then
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rst <= '1';
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elsif rising_edge(clk) then
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rst <= not dcm_locked;
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rst <= not dcm_locked;
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end if;
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end process;
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end process;
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-- module instances
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-- module instances
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-------------------
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-------------------
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