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https://opencores.org/ocsvn/wb4pb/wb4pb/trunk
[/] [wb4pb/] [trunk/] [rtl/] [wbm_picoblaze.v] - Diff between revs 2 and 10
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Rev 2 |
Rev 10 |
Line 64... |
Line 64... |
wire rst;
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wire rst;
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input clk;
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input clk;
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wire clk;
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wire clk;
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output wbm_cyc_o;
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output wbm_cyc_o;
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reg wbm_cyc_o;
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wire wbm_cyc_o;
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output wbm_stb_o;
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output wbm_stb_o;
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reg wbm_stb_o;
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reg wbm_stb_o;
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output wbm_we_o;
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output wbm_we_o;
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reg wbm_we_o;
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reg wbm_we_o;
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output[7:0] wbm_adr_o;
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output[7:0] wbm_adr_o;
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Line 101... |
Line 101... |
S_SOFTWARE_HANDSHAKE = 2'b10,
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S_SOFTWARE_HANDSHAKE = 2'b10,
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S_SOFTWARE_READ = 2'b11
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S_SOFTWARE_READ = 2'b11
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;
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;
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reg[1:0] state;
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reg[1:0] state;
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always@(wbm_stb_o) wbm_cyc_o = wbm_stb_o;
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assign wbm_cyc_o = wbm_stb_o;
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always@(posedge clk) begin
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always@(posedge clk) begin
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case(state)
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case(state)
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S_IDLE:
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S_IDLE:
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Line 131... |
Line 131... |
pb_in_port_o <= WB_ACK_FLAG;
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pb_in_port_o <= WB_ACK_FLAG;
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state <= S_SOFTWARE_HANDSHAKE;
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state <= S_SOFTWARE_HANDSHAKE;
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end
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end
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S_SOFTWARE_HANDSHAKE:
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S_SOFTWARE_HANDSHAKE:
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// software recognition of wishbone handshake
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// software recognition of wishbone handshake
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if (pb_read_strobe_i) begin
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if (pb_read_strobe_i)
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// transfer complete for a write access
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// transfer complete for a write access
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if (wbm_we_o) begin
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if (wbm_we_o) begin
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pb_in_port_o <= 8'h00;
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pb_in_port_o <= 8'h00;
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state <= S_IDLE;
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state <= S_IDLE;
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// presenting valid wishbone data to PicoBlaze (TM) port in read
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// presenting valid wishbone data to PicoBlaze (TM) port in read
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// access
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// access
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end else begin
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end else begin
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pb_in_port_o <= wb_buffer;
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pb_in_port_o <= wb_buffer;
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state <= S_SOFTWARE_READ;
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state <= S_SOFTWARE_READ;
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end
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end
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end
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S_SOFTWARE_READ:
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S_SOFTWARE_READ:
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// transfer complete for a read access after software recognition of
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// transfer complete for a read access after software recognition of
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// wishbone data
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// wishbone data
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if (pb_read_strobe_i) begin
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if (pb_read_strobe_i) begin
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pb_in_port_o <= 8'h00;
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pb_in_port_o <= 8'h00;
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