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https://opencores.org/ocsvn/wb4pb/wb4pb/trunk
[/] [wb4pb/] [trunk/] [rtl/] [wbs_uart.v] - Diff between revs 12 and 17
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Rev 12 |
Rev 17 |
Line 178... |
Line 178... |
wbs_dat_s2m_o <= baud_limit[15:8];
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wbs_dat_s2m_o <= baud_limit[15:8];
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end
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end
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default: ;
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default: ;
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endcase
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endcase
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if (rst) begin
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if (rst)
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wbs_ack_o <= 1'b0;
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wbs_ack_o <= 1'b0;
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end
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end
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end
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// Xilinx (R) uart macro instances
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// Xilinx (R) uart macro instances
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//////////////////////////////////
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//////////////////////////////////
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