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https://opencores.org/ocsvn/wb4pb/wb4pb/trunk
[/] [wb4pb/] [trunk/] [sim/] [do/] [picoblaze_wb_gpio_tb.do] - Diff between revs 9 and 20
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Rev 20 |
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# IMPORTANT NOTICE!
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# IMPORTANT NOTICE!
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# Verilog (R) simulation flow requires Xilinx (R) ISE (R) to be installed.
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# Verilog (R) simulation flow requires Xilinx (R) ISE (R) to be installed.
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# user settings: preferred hdl and working directory
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# user settings: preferred hdl and working directory
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set wd "e:/home_users/ste.fis/projects/wb4pb/trunk/sim"
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set wd "e:/home_users/ste.fis/projects/wb4pb/trunk/sim"
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set isVHDL no
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set isVHDL yes
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# working directory cannot be changed while simulation is running
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# working directory cannot be changed while simulation is running
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if {![string equal -nocase [pwd] $wd]} {
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if {![string equal -nocase [pwd] $wd]} {
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quit -sim
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quit -sim
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cd $wd
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cd $wd
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