URL
https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk
[/] [wb_lpc/] [trunk/] [rtl/] [verilog/] [wb_lpc_defines.v] - Diff between revs 5 and 11
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 5 |
Rev 11 |
| Line 41... |
Line 41... |
`define LPC_STOP 4'b1111
|
`define LPC_STOP 4'b1111
|
`define LPC_FW_READ 4'b1101
|
`define LPC_FW_READ 4'b1101
|
`define LPC_FW_WRITE 4'b1110
|
`define LPC_FW_WRITE 4'b1110
|
|
|
`define LPC_SYNC_READY 4'b0000 // LPC Sync Ready
|
`define LPC_SYNC_READY 4'b0000 // LPC Sync Ready
|
`define LPC_SYNC_SWAIT 4'b0101 // LPC Sync Short Wait
|
`define LPC_SYNC_SWAIT 4'b0101 // LPC Sync Short Wait (up to 8 cycles)
|
`define LPC_SYNC_LWAIT 4'b0110 // LPC Sync Long Wait
|
`define LPC_SYNC_LWAIT 4'b0110 // LPC Sync Long Wait (no limit)
|
`define LPC_SYNC_MORE 4'b1001 // LPC Sync Ready More (DMA only)
|
`define LPC_SYNC_MORE 4'b1001 // LPC Sync Ready More (DMA only)
|
`define LPC_SYNC_ERROR 4'b1010 // LPC Sync Error
|
`define LPC_SYNC_ERROR 4'b1010 // LPC Sync Error
|
|
|
`define LPC_ST_IDLE 13'h000 // LPC Idle state
|
`define LPC_ST_IDLE 13'h000 // LPC Idle state
|
`define LPC_ST_START 13'h001 // LPC Start state
|
`define LPC_ST_START 13'h001 // LPC Start state
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.