Line 39... |
Line 39... |
//
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//
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#include <stdio.h>
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#include <stdio.h>
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#include "verilated.h"
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#include "verilated.h"
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#include "Vwbddrsdram.h"
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#include "Vwbddrsdram.h"
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#include "ddrsdramsim.h"
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#include "pddrsim.h"
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// #include "ddrsdramsim.h"
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|
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const int BOMBCOUNT = 2048,
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const int BOMBCOUNT = 2048,
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SDRAMMASK = 0x3ffffff,
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SDRAMMASK = 0x3ffffff,
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LGMEMSIZE = 28;
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LGMEMSIZE = 28;
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class DDRSDRAM_TB {
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class DDRSDRAM_TB {
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long m_tickcount;
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long m_tickcount;
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Vwbddrsdram *m_core;
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Vwbddrsdram *m_core;
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DDRSDRAMSIM *m_sdram;
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PDDRSIM *m_sdram;
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bool m_bomb;
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bool m_bomb;
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public:
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public:
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DDRSDRAM_TB(void) {
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DDRSDRAM_TB(void) {
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m_core = new Vwbddrsdram;
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m_core = new Vwbddrsdram;
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m_sdram= new DDRSDRAMSIM(LGMEMSIZE);
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m_sdram= new PDDRSIM(LGMEMSIZE);
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}
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}
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unsigned &operator[](const int index) { return (*m_sdram)[index]; }
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unsigned long operator[](const int index) { return (*m_sdram)[index]; }
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void set(unsigned addr, unsigned v) {
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void set(unsigned addr, unsigned long v) {
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(*m_sdram)[addr] = v;
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m_sdram->set(addr, v);
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}
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}
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void tick(void) {
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void tick(void) {
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m_core->i_clk = 1;
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m_core->i_clk = 1;
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m_core->i_ddr_data = (*m_sdram)(
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m_core->i_ddr_data = (*m_sdram)(
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m_core->o_ddr_reset_n,
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m_core->o_ddr_reset_n,
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m_core->o_ddr_cke,
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m_core->o_ddr_cke,
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m_core->o_ddr_cs_n,
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m_core->o_ddr_ras_n,
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m_core->o_ddr_cas_n,
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m_core->o_ddr_we_n,
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m_core->o_ddr_dqs,
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m_core->o_ddr_dm,
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m_core->o_ddr_odt,
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m_core->o_ddr_bus_oe,
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m_core->o_ddr_bus_oe,
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m_core->o_ddr_addr,
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m_core->o_ddr_cmd_a,
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m_core->o_ddr_ba,
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m_core->o_ddr_cmd_b,
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m_core->o_ddr_data);
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m_core->o_ddr_data);
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bool writeout = (!m_core->v__DOT__reset_override);
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bool writeout = (!m_core->v__DOT__reset_override);
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int cmd;
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int cmda, cmdb, cmd;
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cmd = (m_core->o_ddr_reset_n?0:32)
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cmda = (m_core->o_ddr_reset_n?0:32)
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|(m_core->o_ddr_cke?0:16)
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|(m_core->o_ddr_cke?0:16)
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|(m_core->o_ddr_cs_n?8:0)
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|((m_core->o_ddr_cmd_a&(1<<26))?8:0)
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|(m_core->o_ddr_ras_n?4:0)
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|((m_core->o_ddr_cmd_a&(1<<25))?4:0)
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|(m_core->o_ddr_cas_n?2:0)
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|((m_core->o_ddr_cmd_a&(1<<24))?2:0)
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|(m_core->o_ddr_we_n?1:0);
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|((m_core->o_ddr_cmd_a&(1<<23))?1:0);
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if ((cmd&0x0f)==DDR_REFRESH)
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cmdb = (m_core->o_ddr_reset_n?0:32)
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|(m_core->o_ddr_cke?0:16)
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|((m_core->o_ddr_cmd_b&(1<<26))?8:0)
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|((m_core->o_ddr_cmd_b&(1<<25))?4:0)
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|((m_core->o_ddr_cmd_b&(1<<24))?2:0)
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|((m_core->o_ddr_cmd_b&(1<<23))?1:0);
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cmd = m_core->o_ddr_cmd_b;
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if ((cmdb&0x0f)!=DDR_NOOP)
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cmd = m_core->o_ddr_cmd_a;
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if ((cmda&0x0f)==DDR_REFRESH)
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writeout = true;
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if ((cmdb&0x0f)==DDR_REFRESH)
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writeout = true;
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writeout = true;
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if (writeout) {
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if (writeout) {
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printf("%08lx-WB: %s/%s %s%s%s %s@0x%08x[%08x/%08x] -- ",
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printf("%08lx-WB: %s/%s %s%s%s %s@0x%08x[%016lx/%016lx] -- ",
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m_tickcount,
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m_tickcount,
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(m_core->i_wb_cyc)?"CYC":" ",
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(m_core->i_wb_cyc)?"CYC":" ",
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(m_core->i_wb_stb)?"STB":" ",
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(m_core->i_wb_stb)?"STB":" ",
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(m_core->o_wb_stall)?"STALL":" ",
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(m_core->o_wb_stall)?"STALL":" ",
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(m_core->o_wb_ack)?"ACK":" ",
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(m_core->o_wb_ack)?"ACK":" ",
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Line 105... |
Line 110... |
(m_core->i_wb_we)?"W":"R",
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(m_core->i_wb_we)?"W":"R",
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(m_core->i_wb_addr),
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(m_core->i_wb_addr),
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(m_core->i_wb_data),
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(m_core->i_wb_data),
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(m_core->o_wb_data));
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(m_core->o_wb_data));
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|
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printf("%s%s %d%d%d%d %s%s%s%s B[%d]@%04x %08x %08x",
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printf("%s%s %d%d%d%d,%d%d%d%d %s%s[%x%x]%s%s B[%d,%d]@%04x %016lx %016lx",
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(m_core->o_ddr_reset_n)?" ":"R",
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(m_core->o_ddr_reset_n)?" ":"R",
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(m_core->o_ddr_cke)?"CK":" ",
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(m_core->o_ddr_cke)?"CK":" ",
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(m_core->o_ddr_cs_n),
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(cmda&0x08)?1:0, (cmda&0x04)?1:0,
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(m_core->o_ddr_ras_n),
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(cmda&0x02)?1:0, (cmda&0x01)?1:0,
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(m_core->o_ddr_cas_n),
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(cmdb&0x08)?1:0, (cmdb&0x04)?1:0,
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(m_core->o_ddr_we_n),
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(cmdb&0x02)?1:0, (cmdb&0x01)?1:0,
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//
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//
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(m_core->o_ddr_dqs)?"D":" ",
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((m_core->o_ddr_cmd_a>>5)&1)?"D":"-",
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(m_core->o_ddr_dm)?"M":" ",
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((m_core->o_ddr_cmd_b>>5)&1)?"D":"-",
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(m_core->o_ddr_odt)?"O":" ",
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((m_core->o_ddr_cmd_a>>1)&0x0f),
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((m_core->o_ddr_cmd_b>>1)&0x0f),
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(m_core->o_ddr_cmd_a&1)?"O":" ",
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(m_core->o_ddr_bus_oe)?"E":" ",
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(m_core->o_ddr_bus_oe)?"E":" ",
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//
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//
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(m_core->o_ddr_ba),
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(m_core->o_ddr_cmd_a>>(6+14))&0x07, // Get the bank address
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(m_core->o_ddr_addr),
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(m_core->o_ddr_cmd_b>>(6+14))&0x07, // Get the bank address
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((cmd>>6)&0x03fff), // The command address
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(m_core->i_ddr_data),
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(m_core->i_ddr_data),
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(m_core->o_ddr_data));
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(m_core->o_ddr_data));
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|
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printf(" FIFO[%x,%x](%s,%d,%08x)",
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printf(" FIFO[%x,%x](%s,%d,%016lx)",
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m_core->v__DOT__bus_fifo_head,
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m_core->v__DOT__bus_fifo_head,
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m_core->v__DOT__bus_fifo_tail,
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m_core->v__DOT__bus_fifo_tail,
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(m_core->v__DOT__bus_fifo_new[m_core->v__DOT__bus_fifo_tail])?"N":"o",
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(m_core->v__DOT__bus_fifo_new[m_core->v__DOT__bus_fifo_tail])?"N":"o",
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m_core->v__DOT__bus_fifo_sub[m_core->v__DOT__bus_fifo_tail],
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m_core->v__DOT__bus_fifo_sub[m_core->v__DOT__bus_fifo_tail],
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m_core->v__DOT__bus_fifo_data[m_core->v__DOT__bus_fifo_tail]);
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m_core->v__DOT__bus_fifo_data[m_core->v__DOT__bus_fifo_tail]);
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printf(" BUS[A%03x/R%03x/N%03x/K%03x/%d]",
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printf(" BUS[A%03x/R%03x/N%03x/K%03x/T%03x/%02x]",
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(m_core->v__DOT__bus_active),
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(m_core->v__DOT__bus_active),
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(m_core->v__DOT__bus_read),
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(m_core->v__DOT__bus_read),
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(m_core->v__DOT__bus_new),
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(m_core->v__DOT__bus_new),
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(m_core->v__DOT__bus_ack),
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(m_core->v__DOT__bus_ack),
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(m_core->v__DOT__bus_subaddr[8]));
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(m_core->v__DOT__bus_odt),
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(m_core->v__DOT__bus_subaddr));
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/*
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/*
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// Reset logic
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// Reset logic
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printf(" RST(%06x%s[%d] - %08x->%08x)",
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printf(" RST(%06x%s[%2d] - %08x->%08x)",
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m_core->v__DOT__reset_timer,
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m_core->v__DOT__reset_timer,
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(m_core->v__DOT__reset_ztimer)?"Z":" ",
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(m_core->v__DOT__reset_ztimer)?"Z":" ",
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(m_core->v__DOT__reset_address),
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(m_core->v__DOT__reset_address),
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(m_core->v__DOT__reset_instruction),
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(m_core->v__DOT__reset_instruction),
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(m_core->v__DOT__reset_cmd));
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(m_core->v__DOT__reset_cmd));
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*/
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*/
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printf(" R_%s%03x[%d]%04x:%d/%08x",
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printf(" R_%s%03x[%d]%04x:%d/%02x/%016lx",
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(!m_core->v__DOT__r_pending)?"_"
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(!m_core->v__DOT__r_pending)?"_"
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:(m_core->v__DOT__r_we)?"W":"R",
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:(m_core->v__DOT__r_we)?"W":"R",
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(m_core->v__DOT__r_row),
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(m_core->v__DOT__r_row),
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(m_core->v__DOT__r_bank),
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(m_core->v__DOT__r_bank),
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(m_core->v__DOT__r_col),
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(m_core->v__DOT__r_col),
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(m_core->v__DOT__r_sub),
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(m_core->v__DOT__r_sub),
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(m_core->v__DOT__r_sel),
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(m_core->v__DOT__r_data));
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(m_core->v__DOT__r_data));
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|
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printf(" S_%s%03x[%d]%04x:%d/%08x%s%s%s",
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printf(" S_%s%03x[%d]%04x:%d/%02x/%016lx%s%s%s",
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(!m_core->v__DOT__s_pending)?"_"
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(!m_core->v__DOT__s_pending)?"_"
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:(m_core->v__DOT__s_we)?"W":"R",
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:(m_core->v__DOT__s_we)?"W":"R",
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(m_core->v__DOT__s_row),
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(m_core->v__DOT__s_row),
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(m_core->v__DOT__s_bank),
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(m_core->v__DOT__s_bank),
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(m_core->v__DOT__s_col),
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(m_core->v__DOT__s_col),
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(m_core->v__DOT__s_sub),
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(m_core->v__DOT__s_sub),
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(m_core->v__DOT__s_sel),
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(m_core->v__DOT__s_data),
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(m_core->v__DOT__s_data),
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(m_core->v__DOT__w_s_match)?"M":" ",
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(m_core->v__DOT__w_s_match)?"M":" ",
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(m_core->v__DOT__pipe_stall)?"P":" ",
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(m_core->v__DOT__pipe_stall)?"P":" ",
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"-"
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"-"
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//(m_core->v__DOT__s_stall)?"S":" "
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//(m_core->v__DOT__s_stall)?"S":" "
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Line 178... |
Line 189... |
// (m_core->v__DOT__all_banks_closed)?"b":"B",
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// (m_core->v__DOT__all_banks_closed)?"b":"B",
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(m_core->v__DOT__need_close_bank)?"C":"N",
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(m_core->v__DOT__need_close_bank)?"C":"N",
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//:(m_core->v__DOT__maybe_close_next_bank)?"c":"N",
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//:(m_core->v__DOT__maybe_close_next_bank)?"c":"N",
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(m_core->v__DOT__need_open_bank)?"O":"K");
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(m_core->v__DOT__need_open_bank)?"O":"K");
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// :(m_core->v__DOT__maybe_open_next_bank)?"o":"K");
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// :(m_core->v__DOT__maybe_open_next_bank)?"o":"K");
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|
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for(int i=0; i<8; i++) {
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for(int i=0; i<8; i++) {
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printf("%s%s%s%x%x@%x%s",
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printf("%s%s%s%04x|%04x@%x%s",
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(m_core->v__DOT__r_bank==i)?"R":"[",
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(m_core->v__DOT__r_bank==i)?"R":"[",
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((m_core->v__DOT__bank_open)&(1<<i))?"+":" ",
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((m_core->v__DOT__bank_open)&(1<<i))?"+":" ",
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((m_core->v__DOT__bank_closed)&(1<<i))?"-":" ",
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((m_core->v__DOT__bank_closed)&(1<<i))?"-":" ",
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m_core->v__DOT__bank_status[i],
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m_core->v__DOT__bank_status[i],
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m_sdram->m_bank[i].m_state&0x0f,
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m_sdram->bank_state(i),
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m_core->v__DOT__bank_address[i],
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m_core->v__DOT__bank_address[i],
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(m_core->v__DOT__r_nxt_bank==i)?"N":"]");
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(m_core->v__DOT__r_nxt_bank==i)?"N":"]");
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}
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}
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|
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|
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Line 201... |
Line 213... |
(m_core->v__DOT__reset_override)?"R":" ",
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(m_core->v__DOT__reset_override)?"R":" ",
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(m_core->v__DOT__need_refresh)?"N":" ",
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(m_core->v__DOT__need_refresh)?"N":" ",
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(m_core->v__DOT__need_close_bank)?"C":" ",
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(m_core->v__DOT__need_close_bank)?"C":" ",
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(m_core->v__DOT__need_open_bank)?"O":" ",
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(m_core->v__DOT__need_open_bank)?"O":" ",
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(m_core->v__DOT__valid_bank)?"V":" ",
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(m_core->v__DOT__valid_bank)?"V":" ",
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(m_core->v__DOT__r_move)?"R":" ",
|
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(m_core->v__DOT__maybe_close_next_bank)?"c":" ",
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(m_core->v__DOT__maybe_close_next_bank)?"c":" ",
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(m_core->v__DOT__maybe_open_next_bank)?"o":" ",
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(m_core->v__DOT__maybe_open_next_bank)?"o":" ",
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(m_core->v__DOT__pre_valid)?"p":" ",
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(m_core->v__DOT__pre_valid)?"p":" ",
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(m_core->v__DOT__w_r_valid)?"r":" ",
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(m_core->v__DOT__w_r_valid)?"r":" ",
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(m_core->v__DOT__w_s_valid)?"s":" ");
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(m_core->v__DOT__w_s_valid)?"s":" ",
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(m_core->v__DOT__pre_ack)?"k":" ");
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|
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/*
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// Refresh logic
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// Refresh logic
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printf(" F%s%05x:%x/%s",
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printf(" F%s%05x:%x/%s",
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(m_core->v__DOT__refresh_ztimer)?"Z":" ",
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(m_core->v__DOT__refresh_ztimer)?"Z":" ",
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m_core->v__DOT__refresh_counter,
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m_core->v__DOT__refresh_counter,
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m_core->v__DOT__refresh_addr,
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m_core->v__DOT__refresh_addr,
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(m_core->v__DOT__need_refresh)?"N":" ");
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(m_core->v__DOT__need_refresh)?"N":" ");
|
|
*/
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|
|
|
if (m_core->v__DOT__reset_override)
|
if (m_core->v__DOT__reset_override)
|
printf(" OVERRIDE");
|
printf(" OVERRIDE");
|
//if(m_core->v__DOT__last_open_bank)printf(" LST-OPEN");
|
//if(m_core->v__DOT__last_open_bank)printf(" LST-OPEN");
|
switch(cmd) {
|
switch(cmda) {
|
|
case DDR_MRSET: printf("%13s", " MRSET"); break;
|
|
case DDR_REFRESH: printf("%13s", " REFRESH"); break;
|
|
case DDR_PRECHARGE: printf("%9s%3s", " PRECHARGE", ((m_core->o_ddr_cmd_a>>6)&0x400)?"-ALL":""); break;
|
|
case DDR_ACTIVATE: printf("%13s", " ACTIVATE"); break;
|
|
case DDR_WRITE: printf("%13s", " WRITE"); break;
|
|
case DDR_READ: printf("%13s", " READ"); break;
|
|
case DDR_ZQS: printf("%13s", " ZQS"); break;
|
|
case DDR_NOOP: printf("%13s", " NOOP"); break;
|
|
default: printf(" UCMD(%02x)", cmda); break;
|
|
}
|
|
|
|
switch(cmdb) {
|
case DDR_MRSET: printf(" MRSET"); break;
|
case DDR_MRSET: printf(" MRSET"); break;
|
case DDR_REFRESH: printf(" REFRESH"); break;
|
case DDR_REFRESH: printf(" REFRESH"); break;
|
case DDR_PRECHARGE: printf(" PRECHARGE%s", (m_core->o_ddr_addr&0x400)?"-ALL":""); break;
|
case DDR_PRECHARGE: printf(" PRECHARGE%s", ((m_core->o_ddr_cmd_b>>6)&0x400)?"-ALL":""); break;
|
case DDR_ACTIVATE: printf(" ACTIVATE"); break;
|
case DDR_ACTIVATE: printf(" ACTIVATE"); break;
|
case DDR_WRITE: printf(" WRITE"); break;
|
case DDR_WRITE: printf(" WRITE"); break;
|
case DDR_READ: printf(" READ"); break;
|
case DDR_READ: printf(" READ"); break;
|
case DDR_ZQS: printf(" ZQS"); break;
|
case DDR_ZQS: printf(" ZQS"); break;
|
case DDR_NOOP: printf(" NOOP"); break;
|
case DDR_NOOP: printf(" NOOP"); break;
|
default: printf(" Unknown-CMD(%02x)", cmd); break;
|
default: printf(" UCMD(%02x)", cmdb); break;
|
}
|
}
|
|
|
// Decode the command
|
// Decode the command
|
|
|
printf("\n");
|
printf("\n");
|
Line 275... |
Line 297... |
m_core->i_wb_stb = 0;
|
m_core->i_wb_stb = 0;
|
tick();
|
tick();
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
}
|
}
|
|
|
unsigned wb_read(unsigned a) {
|
unsigned long wb_read(unsigned a) {
|
int errcount = 0;
|
int errcount = 0;
|
unsigned result;
|
unsigned long result;
|
|
|
printf("WB-READ(%08x)\n", a);
|
printf("WB-READ(%08x)\n", a);
|
|
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_stb = 1;
|
Line 322... |
Line 344... |
|
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
return result;
|
return result;
|
}
|
}
|
|
|
void wb_read(unsigned a, int len, unsigned *buf) {
|
void wb_read(unsigned a, int len, unsigned long *buf) {
|
int errcount = 0;
|
int errcount = 0;
|
int THISBOMBCOUNT = BOMBCOUNT * len;
|
int THISBOMBCOUNT = BOMBCOUNT * len;
|
int cnt, rdidx, inc;
|
int cnt, rdidx, inc;
|
|
|
printf("WB-READ(%08x, %d)\n", a, len);
|
printf("WB-READ(%08x, %d)\n", a, len);
|
Line 356... |
Line 378... |
if (!s)
|
if (!s)
|
m_core->i_wb_addr += inc;
|
m_core->i_wb_addr += inc;
|
cnt += (s==0)?1:0;
|
cnt += (s==0)?1:0;
|
if (m_core->o_wb_ack) {
|
if (m_core->o_wb_ack) {
|
buf[rdidx] = m_core->o_wb_data;
|
buf[rdidx] = m_core->o_wb_data;
|
printf("WB-READ[%08x] = %08x\n", a+rdidx,
|
printf("WB-READ[%08x] = %016lx\n", a+rdidx,
|
m_core->o_wb_data);
|
m_core->o_wb_data);
|
if (buf[rdidx] != (*this)[a+rdidx]) {
|
if (buf[rdidx] != (*this)[a+rdidx]) {
|
printf("READ-FAIL\n");
|
printf("READ-FAIL\n");
|
assert(buf[rdidx] == (*this)[a+rdidx]);
|
assert(buf[rdidx] == (*this)[a+rdidx]);
|
}
|
}
|
Line 372... |
Line 394... |
|
|
while((rdidx < len)&&(errcount++ < THISBOMBCOUNT)) {
|
while((rdidx < len)&&(errcount++ < THISBOMBCOUNT)) {
|
tick();
|
tick();
|
if (m_core->o_wb_ack) {
|
if (m_core->o_wb_ack) {
|
buf[rdidx] = m_core->o_wb_data;
|
buf[rdidx] = m_core->o_wb_data;
|
printf("WB-READ[%08x] = %08x\n", a+rdidx,
|
printf("WB-READ[%08x] = %016lx\n", a+rdidx,
|
m_core->o_wb_data);
|
m_core->o_wb_data);
|
if (buf[rdidx] != (*this)[a+rdidx]) {
|
if (buf[rdidx] != (*this)[a+rdidx]) {
|
printf("READ-FAIL\n");
|
printf("READ-FAIL\n");
|
assert(buf[rdidx] == (*this)[a+rdidx]);
|
assert(buf[rdidx] == (*this)[a+rdidx]);
|
}
|
}
|
Line 397... |
Line 419... |
tick();
|
tick();
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
}
|
}
|
|
|
void wb_write(unsigned a, unsigned int v) {
|
void wb_write(unsigned a, unsigned long v) {
|
int errcount = 0;
|
int errcount = 0;
|
|
|
printf("WB-WRITE(%08x) = %08x\n", a, v);
|
printf("WB-WRITE(%08x) = %016lx\n", a, v);
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_we = 1;
|
m_core->i_wb_we = 1;
|
m_core->i_wb_addr= a & SDRAMMASK;
|
m_core->i_wb_addr= a & SDRAMMASK;
|
|
m_core->i_wb_sel = 0x0ff;
|
m_core->i_wb_data= v;
|
m_core->i_wb_data= v;
|
|
|
if (m_core->o_wb_stall)
|
if (m_core->o_wb_stall)
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
tick();
|
tick();
|
Line 429... |
Line 452... |
} tick();
|
} tick();
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
}
|
}
|
|
|
void wb_write(unsigned a, unsigned int ln, unsigned int *buf) {
|
void wb_write(unsigned a, unsigned int ln, unsigned long *buf) {
|
unsigned errcount = 0, nacks = 0;
|
unsigned errcount = 0, nacks = 0;
|
|
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_stb = 1;
|
for(unsigned stbcnt=0; stbcnt<ln; stbcnt++) {
|
for(unsigned stbcnt=0; stbcnt<ln; stbcnt++) {
|
m_core->i_wb_we = 1;
|
m_core->i_wb_we = 1;
|
m_core->i_wb_addr= (a+stbcnt) & SDRAMMASK;
|
m_core->i_wb_addr= (a+stbcnt) & SDRAMMASK;
|
|
m_core->i_wb_sel = 0x0ff;
|
m_core->i_wb_data= buf[stbcnt];
|
m_core->i_wb_data= buf[stbcnt];
|
errcount = 0;
|
errcount = 0;
|
|
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall)) {
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall)) {
|
tick(); if (m_core->o_wb_ack) nacks++;
|
tick(); if (m_core->o_wb_ack) nacks++;
|
Line 475... |
Line 499... |
|
|
bool bombed(void) const { return m_bomb; }
|
bool bombed(void) const { return m_bomb; }
|
|
|
};
|
};
|
|
|
void uload(unsigned len, unsigned *buf) {
|
void uload(unsigned len, unsigned long *buf) {
|
FILE *fp = fopen("/dev/urandom", "r");
|
FILE *fp = fopen("/dev/urandom", "r");
|
|
|
if ((NULL == fp)||(len != fread(buf, sizeof(unsigned), len, fp))) {
|
if ((NULL == fp)||(len != fread(buf, sizeof(unsigned long), len, fp))) {
|
for(int i=0; i<(int)len; i++)
|
for(int i=0; i<(int)len; i++)
|
buf[i] = rand();
|
buf[i] = (((unsigned long)rand())<<32)
|
|
|(((unsigned long)rand())&(-1l<<32));
|
} if (NULL == fp)
|
} if (NULL == fp)
|
fclose(fp);
|
fclose(fp);
|
}
|
}
|
|
|
int main(int argc, char **argv) {
|
int main(int argc, char **argv) {
|
Verilated::commandArgs(argc, argv);
|
Verilated::commandArgs(argc, argv);
|
DDRSDRAM_TB *tb = new DDRSDRAM_TB;
|
DDRSDRAM_TB *tb = new DDRSDRAM_TB;
|
unsigned *rdbuf, *mbuf;
|
unsigned long *rdbuf, *mbuf;
|
unsigned mlen = (1<<(LGMEMSIZE-2));
|
unsigned mlen = (1<<(LGMEMSIZE-3));
|
|
|
printf("Giving the core 140k cycles to start up\n");
|
printf("Giving the core 140k cycles to start up\n");
|
// Before testing, let's give the unit time enough to warm up
|
// Before testing, let's give the unit time enough to warm up
|
tb->reset();
|
tb->reset();
|
for(int i=0; i<141195; i++)
|
for(int i=0; i<141195; i++)
|
Line 503... |
Line 528... |
// space. It'll probably be good enough, and it'll finish while I'm
|
// space. It'll probably be good enough, and it'll finish while I'm
|
// waiting ...
|
// waiting ...
|
mlen = 1<<16;
|
mlen = 1<<16;
|
|
|
printf("Getting some memory ...\n");
|
printf("Getting some memory ...\n");
|
rdbuf = new unsigned[mlen];
|
rdbuf = new unsigned long[mlen];
|
mbuf = new unsigned[mlen]; // Match buffer
|
mbuf = new unsigned long[mlen]; // Match buffer
|
printf("Charging my memory with random values\n");
|
printf("Charging my memory with random values\n");
|
uload(mlen, rdbuf);
|
uload(mlen, rdbuf);
|
|
|
#define CASE_TESTS
|
#define CASE_TESTS
|
#define SINGULAR_WRITE
|
#define SINGULAR_WRITE
|
Line 520... |
Line 545... |
#define SKIP_WRITE
|
#define SKIP_WRITE
|
#define SKIP_READ
|
#define SKIP_READ
|
|
|
#ifdef CASE_TESTS
|
#ifdef CASE_TESTS
|
{
|
{
|
unsigned v;
|
unsigned long v;
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8; i++) {
|
tb->wb_write(i, rdbuf[i]);
|
tb->wb_write(i, rdbuf[i]);
|
if ((v=tb->wb_read(i)) != rdbuf[i]) {
|
if ((v=tb->wb_read(i)) != rdbuf[i]) {
|
printf("CASE-1, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[i], i, v);
|
printf("CASE-1, %16lx -> MEM[%08x] -> %16lx FAILED (R/W not equal)\n", rdbuf[i], i, v);
|
goto test_failure;
|
goto test_failure;
|
}
|
} else printf("MATCH[%d] = %16lx\n", i, rdbuf[i]);
|
}
|
}
|
}
|
}
|
|
|
// Now repeat, hitting a different bank with each command
|
// Now repeat, hitting a different bank with each command
|
{
|
{
|
unsigned v, a;
|
unsigned a;
|
|
unsigned long v;
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8; i++) {
|
a = 1087 + i*1031;
|
a = 1087 + i*1031;
|
tb->wb_write(a, rdbuf[a]);
|
tb->wb_write(a, rdbuf[a]);
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
printf("CASE-2, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
printf("CASE-2, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
// And again, hitting the same bank with each command
|
// And again, hitting the same bank with each command
|
{
|
{
|
unsigned v, a;
|
unsigned a;
|
|
unsigned long v;
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8; i++) {
|
a = 1109 + i*1024;
|
a = 1109 + i*1024;
|
tb->wb_write(a, rdbuf[a]);
|
tb->wb_write(a, rdbuf[a]);
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
printf("CASE-3, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
printf("CASE-3, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
// Same thing, but writing all first before reading
|
// Same thing, but writing all first before reading
|
{
|
{
|
unsigned v, a;
|
unsigned a;
|
|
unsigned long v;
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8; i++) {
|
a = 1109 + i*1024;
|
a = 1109 + i*1024;
|
tb->wb_write(a, rdbuf[a]);
|
tb->wb_write(a, rdbuf[a]);
|
} for(int i=0; i<8; i++) {
|
} for(int i=0; i<8; i++) {
|
a = 1109 + i*1024;
|
a = 1109 + i*1024;
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
printf("CASE-4, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
printf("CASE-4, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
// And a quick pipeline test
|
// And a quick pipeline test
|
{
|
{
|
unsigned v, mbuf[8], a = 379;
|
unsigned long v, mbuf[8];
|
|
unsigned a = 379;
|
tb->wb_write(0, 8, &rdbuf[379]);
|
tb->wb_write(0, 8, &rdbuf[379]);
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8; i++) {
|
a = 379+i;
|
a = 379+i;
|
if ((v=(*tb)[i]) != rdbuf[a]) {
|
if ((v=(*tb)[i]) != rdbuf[a]) {
|
printf("CASE-5, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[a], i, v);
|
printf("CASE-5, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], i, v);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
} tb->wb_read(0, 8, mbuf);
|
} tb->wb_read(0, 8, mbuf);
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8; i++) {
|
a = 379+i;
|
a = 379+i;
|
if (mbuf[i] != rdbuf[a]) {
|
if (mbuf[i] != rdbuf[a]) {
|
printf("CASE-6, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[a], i, mbuf[i]);
|
printf("CASE-6, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], i, mbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
Line 600... |
Line 629... |
printf("Starting the single-read test\n");
|
printf("Starting the single-read test\n");
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
tb->wb_write(i, rdbuf[i]);
|
tb->wb_write(i, rdbuf[i]);
|
tb->wb_tick();
|
tb->wb_tick();
|
if ((*tb)[i] != rdbuf[i]) {
|
if ((*tb)[i] != rdbuf[i]) {
|
printf("WRITE[%06x] = %08x (Expecting %08x) FAILED\n",
|
printf("WRITE[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
i, (*tb)[i], rdbuf[i]);
|
i, (*tb)[i], rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
|
|
Line 612... |
Line 641... |
#else
|
#else
|
#ifdef SINGULAR_READ
|
#ifdef SINGULAR_READ
|
// If we aren't doing the write test, we still need to charge
|
// If we aren't doing the write test, we still need to charge
|
// the memory for the read test. Here we do it manually.
|
// the memory for the read test. Here we do it manually.
|
for(int i=0; i<(int)mlen; i++)
|
for(int i=0; i<(int)mlen; i++)
|
(*tb)[i] = rdbuf[i];
|
tb->set(i, rdbuf[i]);
|
#endif // !SINGULAR_WRITE && SINGULAR_READ
|
#endif // !SINGULAR_WRITE && SINGULAR_READ
|
#endif // SINGULAR_WRITE
|
#endif // SINGULAR_WRITE
|
#ifdef SINGULAR_READ
|
#ifdef SINGULAR_READ
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
unsigned v;
|
unsigned long v;
|
if (rdbuf[i] != (v=tb->wb_read(i))) {
|
if (rdbuf[i] != (v=tb->wb_read(i))) {
|
printf("READ[%06x] = %08x (Expecting %08x)\n",
|
printf("READ[%06x] = %016lx (Expecting %016lx)\n",
|
i, v, rdbuf[i]);
|
i, v, rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
tb->wb_tick();
|
tb->wb_tick();
|
Line 637... |
Line 666... |
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
tb->wb_write(0, mlen, rdbuf);
|
tb->wb_write(0, mlen, rdbuf);
|
if (tb->bombed())
|
if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
unsigned v;
|
unsigned long v;
|
if (rdbuf[i] != (v=(*tb)[i])) {
|
if (rdbuf[i] != (v=(*tb)[i])) {
|
printf("V-WRITE[%06x] = %08x (Expecting %08x)\n",
|
printf("V-WRITE[%06x] = %016lx (Expecting %016lx)\n",
|
i, v, rdbuf[i]);
|
i, v, rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
#else
|
#else
|
Line 660... |
Line 689... |
tb->wb_read( 0, mlen, mbuf);
|
tb->wb_read( 0, mlen, mbuf);
|
if (tb->bombed())
|
if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
if (rdbuf[i] != mbuf[i]) {
|
if (rdbuf[i] != mbuf[i]) {
|
printf("V-READ[%06x] = %08x (Expecting %08x)\n",
|
printf("V-READ[%06x] = %016lx (Expecting %016lx)\n",
|
i, mbuf[i], rdbuf[i]);
|
i, mbuf[i], rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
Line 679... |
Line 708... |
for(int i=0; i<(int)mlen; i+=nw) {
|
for(int i=0; i<(int)mlen; i+=nw) {
|
int ln = ((int)mlen-i>nw)?nw:mlen-i;
|
int ln = ((int)mlen-i>nw)?nw:mlen-i;
|
tb->wb_write(i, nw, &rdbuf[i]);
|
tb->wb_write(i, nw, &rdbuf[i]);
|
for(int j=0; j<ln; j++) {
|
for(int j=0; j<ln; j++) {
|
if ((*tb)[i+j] != rdbuf[i+j]) {
|
if ((*tb)[i+j] != rdbuf[i+j]) {
|
printf("P-WRITE[%06x] = %08x (Expecting %08x) FAILED\n",
|
printf("P-WRITE[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
i, (*tb)[i], rdbuf[i]);
|
i, (*tb)[i], rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
Line 693... |
Line 722... |
#ifdef PRIMEVEC_READ
|
#ifdef PRIMEVEC_READ
|
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
// If we aren't doing the write test, we still need to charge
|
// If we aren't doing the write test, we still need to charge
|
// the memory for the read test. Here we do it manually.
|
// the memory for the read test. Here we do it manually.
|
for(int i=0; i<(int)mlen; i++)
|
for(int i=0; i<(int)mlen; i++)
|
(*tb)[i] = rdbuf[i];
|
tb->set(i, rdbuf[i]);
|
#endif
|
#endif
|
#endif
|
#endif
|
#ifdef PRIMEVEC_READ
|
#ifdef PRIMEVEC_READ
|
|
printf("Starting the prime-vector read test\n");
|
{
|
{
|
int nr = 13;
|
int nr = 13;
|
for(int i=0; i<(int)mlen; i+=nr) {
|
for(int i=0; i<(int)mlen; i+=nr) {
|
int ln = ((int)mlen-i>nr)?nr:mlen-i;
|
int ln = ((int)mlen-i>nr)?nr:mlen-i;
|
tb->wb_read(i, nr, &mbuf[i]);
|
tb->wb_read(i, nr, &mbuf[i]);
|
for(int j=0; j<ln; j++) {
|
for(int j=0; j<ln; j++) {
|
if (mbuf[i+j] != rdbuf[i+j]) {
|
if (mbuf[i+j] != rdbuf[i+j]) {
|
printf("P-READ[%06x] = %08x (Expecting %08x) FAILED\n",
|
printf("P-READ[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
i, mbuf[i], rdbuf[i]);
|
i, mbuf[i], rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
Line 723... |
Line 753... |
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
int loc = (i*3889)&(mlen-1);
|
int loc = (i*3889)&(mlen-1);
|
tb->wb_write(loc, rdbuf[loc]);
|
tb->wb_write(loc, rdbuf[loc]);
|
if ((*tb)[loc] != rdbuf[loc]) {
|
if ((*tb)[loc] != rdbuf[loc]) {
|
printf("R-WRITE[%06x] = %08x (Expecting %08x) FAILED\n",
|
printf("R-WRITE[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
i, (*tb)[loc], rdbuf[loc]);
|
i, (*tb)[loc], rdbuf[loc]);
|
goto test_failure;
|
goto test_failure;
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
#else
|
#else
|
#ifdef SKIP_READ
|
#ifdef SKIP_READ
|
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
for(int i=0; i<(int)mlen; i++)
|
for(int i=0; i<(int)mlen; i++)
|
(*tb)[i] = rdbuf[i];
|
tb->set(i, rdbuf[i]);
|
#endif // !SKIP_WRITE && SKIP_READ
|
#endif // !SKIP_WRITE && SKIP_READ
|
#endif
|
#endif
|
#ifdef SKIP_READ
|
#ifdef SKIP_READ
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
int loc = (i*7477)&(mlen-1);
|
int loc = (i*7477)&(mlen-1);
|
mbuf[loc] = tb->wb_read(loc);
|
mbuf[loc] = tb->wb_read(loc);
|
if (mbuf[loc] != rdbuf[loc]) {
|
if (mbuf[loc] != rdbuf[loc]) {
|
printf("R-READ[%06x] = %08x (Expecting %08x) FAILED\n",
|
printf("R-READ[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
loc, mbuf[loc], rdbuf[loc]);
|
loc, mbuf[loc], rdbuf[loc]);
|
goto test_failure;
|
goto test_failure;
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|