| Line 42... |
Line 42... |
#include "verilated.h"
|
#include "verilated.h"
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#include "Vwbddrsdram.h"
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#include "Vwbddrsdram.h"
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#include "pddrsim.h"
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#include "pddrsim.h"
|
// #include "ddrsdramsim.h"
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// #include "ddrsdramsim.h"
|
|
|
const int BOMBCOUNT = 2048,
|
const int BOMBCOUNT = 512,
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SDRAMMASK = 0x3ffffff,
|
SDRAMMASK = 0x0ffffff,
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LGMEMSIZE = 28;
|
LGMEMSIZE = 28;
|
|
|
|
char cmdchar(int cmd) {
|
|
const char cmdstr[] = { 'M', 'R', 'P', 'A', 'W', 'R', 'Z', 'n' };
|
|
// Try to decode a six bit bit-mask field into a command
|
|
if (cmd&32)
|
|
return 'Z';
|
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else if (cmd&16)
|
|
return '-';
|
|
else if (cmd&8)
|
|
return '.';
|
|
else
|
|
return cmdstr[cmd];
|
|
}
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|
|
class DDRSDRAM_TB {
|
class DDRSDRAM_TB {
|
long m_tickcount;
|
long m_tickcount;
|
Vwbddrsdram *m_core;
|
Vwbddrsdram *m_core;
|
PDDRSIM *m_sdram;
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PDDRSIM *m_sdram;
|
bool m_bomb;
|
bool m_bomb;
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| Line 58... |
Line 71... |
DDRSDRAM_TB(void) {
|
DDRSDRAM_TB(void) {
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m_core = new Vwbddrsdram;
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m_core = new Vwbddrsdram;
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m_sdram= new PDDRSIM(LGMEMSIZE);
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m_sdram= new PDDRSIM(LGMEMSIZE);
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}
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}
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|
|
unsigned long operator[](const int index) { return (*m_sdram)[index]; }
|
unsigned operator[](const int index) { return (*m_sdram)[index]; }
|
void set(unsigned addr, unsigned long v) {
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void set(unsigned addr, unsigned v) { m_sdram->set(addr, v); }
|
m_sdram->set(addr, v);
|
|
}
|
|
|
|
void tick(void) {
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void tick(void) {
|
m_core->i_clk = 1;
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m_core->i_clk = 1;
|
|
|
m_core->i_ddr_data = (*m_sdram)(
|
(*m_sdram)(
|
m_core->o_ddr_reset_n,
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m_core->o_ddr_reset_n,
|
m_core->o_ddr_cke,
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m_core->o_ddr_cke,
|
m_core->o_ddr_bus_oe,
|
m_core->o_ddr_bus_oe,
|
m_core->o_ddr_cmd_a,
|
m_core->o_ddr_cmd_a,
|
m_core->o_ddr_cmd_b,
|
m_core->o_ddr_cmd_b,
|
m_core->o_ddr_data);
|
m_core->o_ddr_cmd_c,
|
|
m_core->o_ddr_cmd_d,
|
|
m_core->o_ddr_data,
|
|
m_core->i_ddr_data);
|
|
|
bool writeout = (!m_core->v__DOT__reset_override);
|
bool writeout = (!m_core->v__DOT__reset_override);
|
|
|
int cmda, cmdb, cmd;
|
int cmda, cmdb, cmdc, cmdd;
|
cmda = (m_core->o_ddr_reset_n?0:32)
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cmda = (m_core->o_ddr_reset_n?0:32)
|
|(m_core->o_ddr_cke?0:16)
|
|(m_core->o_ddr_cke?0:16)
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|((m_core->o_ddr_cmd_a&(1<<26))?8:0)
|
|((m_core->o_ddr_cmd_a&(1<<26))?8:0)
|
|((m_core->o_ddr_cmd_a&(1<<25))?4:0)
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|((m_core->o_ddr_cmd_a&(1<<25))?4:0)
|
|((m_core->o_ddr_cmd_a&(1<<24))?2:0)
|
|((m_core->o_ddr_cmd_a&(1<<24))?2:0)
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| Line 89... |
Line 103... |
|(m_core->o_ddr_cke?0:16)
|
|(m_core->o_ddr_cke?0:16)
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|((m_core->o_ddr_cmd_b&(1<<26))?8:0)
|
|((m_core->o_ddr_cmd_b&(1<<26))?8:0)
|
|((m_core->o_ddr_cmd_b&(1<<25))?4:0)
|
|((m_core->o_ddr_cmd_b&(1<<25))?4:0)
|
|((m_core->o_ddr_cmd_b&(1<<24))?2:0)
|
|((m_core->o_ddr_cmd_b&(1<<24))?2:0)
|
|((m_core->o_ddr_cmd_b&(1<<23))?1:0);
|
|((m_core->o_ddr_cmd_b&(1<<23))?1:0);
|
cmd = m_core->o_ddr_cmd_b;
|
cmdc = (m_core->o_ddr_reset_n?0:32)
|
if ((cmdb&0x0f)!=DDR_NOOP)
|
|(m_core->o_ddr_cke?0:16)
|
cmd = m_core->o_ddr_cmd_a;
|
|((m_core->o_ddr_cmd_c&(1<<26))?8:0)
|
if ((cmda&0x0f)==DDR_REFRESH)
|
|((m_core->o_ddr_cmd_c&(1<<25))?4:0)
|
writeout = true;
|
|((m_core->o_ddr_cmd_c&(1<<24))?2:0)
|
if ((cmdb&0x0f)==DDR_REFRESH)
|
|((m_core->o_ddr_cmd_c&(1<<23))?1:0);
|
writeout = true;
|
cmdd = (m_core->o_ddr_reset_n?0:32)
|
|
|(m_core->o_ddr_cke?0:16)
|
|
|((m_core->o_ddr_cmd_d&(1<<26))?8:0)
|
|
|((m_core->o_ddr_cmd_d&(1<<25))?4:0)
|
|
|((m_core->o_ddr_cmd_d&(1<<24))?2:0)
|
|
|((m_core->o_ddr_cmd_d&(1<<23))?1:0);
|
|
|
if (writeout) {
|
if (writeout) {
|
printf("%08lx-WB: %s/%s %s%s%s %s@0x%08x[%016lx/%016lx] -- ",
|
printf("%08lx-WB: %s/%s %s%s%s %s@0x%08x[",
|
m_tickcount,
|
m_tickcount,
|
(m_core->i_wb_cyc)?"CYC":" ",
|
(m_core->i_wb_cyc)?"CYC":" ",
|
(m_core->i_wb_stb)?"STB":" ",
|
(m_core->i_wb_stb)?"STB":" ",
|
(m_core->o_wb_stall)?"STALL":" ",
|
(m_core->o_wb_stall)?"STALL":" ",
|
(m_core->o_wb_ack)?"ACK":" ",
|
(m_core->o_wb_ack)?"ACK":" ",
|
"", // (m_core->o_cmd_accepted)?"BUS":" ",
|
(m_core->o_bus)?"BUS":" ",
|
(m_core->i_wb_we)?"W":"R",
|
(m_core->i_wb_we)?"W":"R",
|
(m_core->i_wb_addr),
|
(m_core->i_wb_addr));
|
(m_core->i_wb_data),
|
printf(".%02x:.%02x:.%04x:%08x/.%02x:.%02x:.%04x:%08x] -- ",
|
(m_core->o_wb_data));
|
(m_core->i_wb_data[3]&0x000ff), (m_core->i_wb_data[2]&0x0ff),
|
|
(m_core->i_wb_data[1]&0x0ffff), (m_core->i_wb_data[0]),
|
|
(m_core->o_wb_data[3]&0x000ff), (m_core->o_wb_data[2]&0x0ff),
|
|
(m_core->o_wb_data[1]&0x0ffff), (m_core->o_wb_data[0]));
|
|
|
printf("%s%s %d%d%d%d,%d%d%d%d %s%s[%x%x]%s%s B[%d,%d]@%04x %016lx %016lx",
|
printf("%s%s %c%c%c%c %s%s%s%s[%x%x%x%x]%s ",
|
(m_core->o_ddr_reset_n)?" ":"R",
|
(m_core->o_ddr_reset_n)?" ":"R",
|
(m_core->o_ddr_cke)?"CK":" ",
|
(m_core->o_ddr_cke)?"CK":" ",
|
(cmda&0x08)?1:0, (cmda&0x04)?1:0,
|
cmdchar(cmda), cmdchar(cmdb),
|
(cmda&0x02)?1:0, (cmda&0x01)?1:0,
|
cmdchar(cmdc), cmdchar(cmdd),
|
(cmdb&0x08)?1:0, (cmdb&0x04)?1:0,
|
|
(cmdb&0x02)?1:0, (cmdb&0x01)?1:0,
|
|
//
|
//
|
|
// Drive DQS?
|
((m_core->o_ddr_cmd_a>>5)&1)?"D":"-",
|
((m_core->o_ddr_cmd_a>>5)&1)?"D":"-",
|
((m_core->o_ddr_cmd_b>>5)&1)?"D":"-",
|
((m_core->o_ddr_cmd_b>>5)&1)?"D":"-",
|
|
((m_core->o_ddr_cmd_c>>5)&1)?"D":"-",
|
|
((m_core->o_ddr_cmd_d>>5)&1)?"D":"-",
|
|
//
|
|
// The data mask
|
((m_core->o_ddr_cmd_a>>1)&0x0f),
|
((m_core->o_ddr_cmd_a>>1)&0x0f),
|
((m_core->o_ddr_cmd_b>>1)&0x0f),
|
((m_core->o_ddr_cmd_b>>1)&0x0f),
|
(m_core->o_ddr_cmd_a&1)?"O":" ",
|
((m_core->o_ddr_cmd_c>>1)&0x0f),
|
(m_core->o_ddr_bus_oe)?"E":" ",
|
((m_core->o_ddr_cmd_d>>1)&0x0f),
|
//
|
//
|
|
// Drive ODT?
|
|
(m_core->o_ddr_cmd_a&1)?"O":" ");
|
|
|
|
printf(" C%xA%x", m_core->v__DOT__cmd_pipe, m_core->v__DOT__nxt_pipe);
|
|
//
|
|
// Now the 4 bank addresses
|
|
printf(" B[%d,%d,%d,%d]@%04x ",
|
(m_core->o_ddr_cmd_a>>(6+14))&0x07, // Get the bank address
|
(m_core->o_ddr_cmd_a>>(6+14))&0x07, // Get the bank address
|
(m_core->o_ddr_cmd_b>>(6+14))&0x07, // Get the bank address
|
(m_core->o_ddr_cmd_b>>(6+14))&0x07, // Get the bank address
|
((cmd>>6)&0x03fff), // The command address
|
(m_core->o_ddr_cmd_c>>(6+14))&0x07, // Get the bank address
|
(m_core->i_ddr_data),
|
(m_core->o_ddr_cmd_d>>(6+14))&0x07, // Get the bank address
|
(m_core->o_ddr_data));
|
((m_core->o_ddr_cmd_d>>6)&0x03fff));// The command address
|
|
printf(".%02x:.%02x:.%04x:%08x .%02x:.%02x:.%04x:%08x",
|
|
(m_core->i_ddr_data[3]&0x0ff),(m_core->i_ddr_data[2]&0x0ff),
|
|
(m_core->i_ddr_data[1]&0x0ffff),(m_core->i_ddr_data[0]),
|
|
(m_core->o_ddr_data[3]&0x0ff),(m_core->o_ddr_data[2]&0x0ff),
|
|
(m_core->o_ddr_data[1]&0x0ffff),
|
|
(m_core->o_ddr_data[0]));
|
|
|
printf(" FIFO[%x,%x](%s,%d,%016lx)",
|
printf(" FIFO[%x,%x](%02x:%02x:%04x:%08x)",
|
m_core->v__DOT__bus_fifo_head,
|
m_core->v__DOT__bus_fifo_head,
|
m_core->v__DOT__bus_fifo_tail,
|
m_core->v__DOT__bus_fifo_tail,
|
(m_core->v__DOT__bus_fifo_new[m_core->v__DOT__bus_fifo_tail])?"N":"o",
|
m_core->v__DOT__bus_fifo_data[m_core->v__DOT__bus_fifo_tail][3]&0x0ff,
|
m_core->v__DOT__bus_fifo_sub[m_core->v__DOT__bus_fifo_tail],
|
m_core->v__DOT__bus_fifo_data[m_core->v__DOT__bus_fifo_tail][2]&0x0ff,
|
m_core->v__DOT__bus_fifo_data[m_core->v__DOT__bus_fifo_tail]);
|
m_core->v__DOT__bus_fifo_data[m_core->v__DOT__bus_fifo_tail][1]&0x0ffff,
|
|
m_core->v__DOT__bus_fifo_data[m_core->v__DOT__bus_fifo_tail][0]);
|
|
|
printf(" BUS[A%03x/R%03x/N%03x/K%03x/T%03x/%02x]",
|
printf(" BUS[A%03x/R%03x/K%03x]",
|
(m_core->v__DOT__bus_active),
|
(m_core->v__DOT__bus_active),
|
(m_core->v__DOT__bus_read),
|
(m_core->v__DOT__bus_read),
|
(m_core->v__DOT__bus_new),
|
(m_core->v__DOT__bus_ack));
|
(m_core->v__DOT__bus_ack),
|
|
(m_core->v__DOT__bus_odt),
|
|
(m_core->v__DOT__bus_subaddr));
|
|
|
|
/*
|
/*
|
// Reset logic
|
// Reset logic
|
printf(" RST(%06x%s[%2d] - %08x->%08x)",
|
printf(" RST(%06x%s[%2d] - %08x->%08x)",
|
m_core->v__DOT__reset_timer,
|
m_core->v__DOT__reset_timer,
|
| Line 156... |
Line 192... |
(m_core->v__DOT__reset_address),
|
(m_core->v__DOT__reset_address),
|
(m_core->v__DOT__reset_instruction),
|
(m_core->v__DOT__reset_instruction),
|
(m_core->v__DOT__reset_cmd));
|
(m_core->v__DOT__reset_cmd));
|
*/
|
*/
|
|
|
printf(" R_%s%03x[%d]%04x:%d/%02x/%016lx",
|
printf(" R_%s%03x[%d]%04x//.:%08x",
|
(!m_core->v__DOT__r_pending)?"_"
|
(!m_core->v__DOT__r_pending)?"_"
|
:(m_core->v__DOT__r_we)?"W":"R",
|
:(m_core->v__DOT__r_we)?"W":"R",
|
(m_core->v__DOT__r_row),
|
(m_core->v__DOT__r_row),
|
(m_core->v__DOT__r_bank),
|
(m_core->v__DOT__r_bank),
|
(m_core->v__DOT__r_col),
|
(m_core->v__DOT__r_col),
|
(m_core->v__DOT__r_sub),
|
(m_core->v__DOT__r_data[3]));
|
(m_core->v__DOT__r_sel),
|
|
(m_core->v__DOT__r_data));
|
|
|
|
printf(" S_%s%03x[%d]%04x:%d/%02x/%016lx%s%s%s",
|
printf(" S_%s%03x[%d]%04x//.:%08x%s%s",
|
(!m_core->v__DOT__s_pending)?"_"
|
(!m_core->v__DOT__s_pending)?"_"
|
:(m_core->v__DOT__s_we)?"W":"R",
|
:(m_core->v__DOT__s_we)?"W":"R",
|
(m_core->v__DOT__s_row),
|
(m_core->v__DOT__s_row),
|
(m_core->v__DOT__s_bank),
|
(m_core->v__DOT__s_bank),
|
(m_core->v__DOT__s_col),
|
(m_core->v__DOT__s_col),
|
(m_core->v__DOT__s_sub),
|
(m_core->v__DOT__s_data[3]),
|
(m_core->v__DOT__s_sel),
|
|
(m_core->v__DOT__s_data),
|
|
(m_core->v__DOT__w_s_match)?"M":" ",
|
|
(m_core->v__DOT__pipe_stall)?"P":" ",
|
(m_core->v__DOT__pipe_stall)?"P":" ",
|
"-"
|
"-"
|
//(m_core->v__DOT__s_stall)?"S":" "
|
//(m_core->v__DOT__s_stall)?"S":" "
|
);
|
);
|
|
|
|
|
printf(" %s%s%s",
|
printf(" %s%s%s",
|
"B",
|
"B",
|
// (m_core->v__DOT__all_banks_closed)?"b":"B",
|
// (m_core->v__DOT__all_banks_closed)?"b":"B",
|
(m_core->v__DOT__need_close_bank)?"C":"N",
|
(m_core->v__DOT__cmd_pipe&1)?"C":"N",
|
//:(m_core->v__DOT__maybe_close_next_bank)?"c":"N",
|
//:(m_core->v__DOT__maybe_close_next_bank)?"c":"N",
|
(m_core->v__DOT__need_open_bank)?"O":"K");
|
(m_core->v__DOT__cmd_pipe&2)?"O":"K");
|
// :(m_core->v__DOT__maybe_open_next_bank)?"o":"K");
|
// :(m_core->v__DOT__maybe_open_next_bank)?"o":"K");
|
|
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8; i++) {
|
printf("%s%s%s%04x|%04x@%x%s",
|
printf("%s%x|%02x@%x%s",
|
(m_core->v__DOT__r_bank==i)?"R":"[",
|
(m_core->v__DOT__r_bank==i)?"R":"[",
|
((m_core->v__DOT__bank_open)&(1<<i))?"+":" ",
|
|
((m_core->v__DOT__bank_closed)&(1<<i))?"-":" ",
|
|
m_core->v__DOT__bank_status[i],
|
m_core->v__DOT__bank_status[i],
|
m_sdram->bank_state(i),
|
m_sdram->bank_state(i),
|
m_core->v__DOT__bank_address[i],
|
m_core->v__DOT__bank_address[i],
|
(m_core->v__DOT__r_nxt_bank==i)?"N":"]");
|
(m_core->v__DOT__r_nxt_bank==i)?"N":"]");
|
}
|
}
|
|
|
|
printf(" %s%s%s%s%s%s%s",
|
/*
|
|
extern int gbl_state, gbl_counts;
|
|
printf(" %2d:%08x ", gbl_state, gbl_counts);
|
|
*/
|
|
|
|
printf(" %s%s%s%s%s%s%s%s%s%s%s",
|
|
(m_core->v__DOT__reset_override)?"R":" ",
|
(m_core->v__DOT__reset_override)?"R":" ",
|
(m_core->v__DOT__need_refresh)?"N":" ",
|
(m_core->v__DOT__need_refresh)?"N":" ",
|
(m_core->v__DOT__need_close_bank)?"C":" ",
|
(m_core->v__DOT__cmd_pipe&1)?"C":" ",
|
(m_core->v__DOT__need_open_bank)?"O":" ",
|
(m_core->v__DOT__cmd_pipe&2)?"O":" ",
|
(m_core->v__DOT__valid_bank)?"V":" ",
|
(m_core->v__DOT__cmd_pipe&4)?"v":" ",
|
(m_core->v__DOT__maybe_close_next_bank)?"c":" ",
|
(m_core->v__DOT__nxt_pipe&1)?"c":" ",
|
(m_core->v__DOT__maybe_open_next_bank)?"o":" ",
|
(m_core->v__DOT__nxt_pipe&2)?"o":" ");
|
(m_core->v__DOT__pre_valid)?"p":" ",
|
|
(m_core->v__DOT__w_r_valid)?"r":" ",
|
|
(m_core->v__DOT__w_s_valid)?"s":" ",
|
|
(m_core->v__DOT__pre_ack)?"k":" ");
|
|
|
|
// Refresh logic
|
|
printf(" F%s%05x:%x/%s",
|
|
(m_core->v__DOT__refresh_ztimer)?"Z":" ",
|
|
m_core->v__DOT__refresh_counter,
|
|
m_core->v__DOT__refresh_addr,
|
|
(m_core->v__DOT__need_refresh)?"N":" ");
|
|
|
|
if (m_core->v__DOT__reset_override)
|
|
printf(" OVERRIDE");
|
|
//if(m_core->v__DOT__last_open_bank)printf(" LST-OPEN");
|
|
switch(cmda) {
|
|
case DDR_MRSET: printf("%13s", " MRSET"); break;
|
|
case DDR_REFRESH: printf("%13s", " REFRESH"); break;
|
|
case DDR_PRECHARGE: printf("%9s%3s", " PRECHARGE", ((m_core->o_ddr_cmd_a>>6)&0x400)?"-ALL":""); break;
|
|
case DDR_ACTIVATE: printf("%13s", " ACTIVATE"); break;
|
|
case DDR_WRITE: printf("%13s", " WRITE"); break;
|
|
case DDR_READ: printf("%13s", " READ"); break;
|
|
case DDR_ZQS: printf("%13s", " ZQS"); break;
|
|
case DDR_NOOP: printf("%13s", " NOOP"); break;
|
|
default: printf(" UCMD(%02x)", cmda); break;
|
|
}
|
|
|
|
switch(cmdb) {
|
|
case DDR_MRSET: printf(" MRSET"); break;
|
|
case DDR_REFRESH: printf(" REFRESH"); break;
|
|
case DDR_PRECHARGE: printf(" PRECHARGE%s", ((m_core->o_ddr_cmd_b>>6)&0x400)?"-ALL":""); break;
|
|
case DDR_ACTIVATE: printf(" ACTIVATE"); break;
|
|
case DDR_WRITE: printf(" WRITE"); break;
|
|
case DDR_READ: printf(" READ"); break;
|
|
case DDR_ZQS: printf(" ZQS"); break;
|
|
case DDR_NOOP: printf(" NOOP"); break;
|
|
default: printf(" UCMD(%02x)", cmdb); break;
|
|
}
|
|
|
|
// Decode the command
|
/*
|
|
// Refresh logic
|
|
printf(" F%s%05x:%x/%s",
|
|
(m_core->v__DOT__refresh_ztimer)?"Z":" ",
|
|
m_core->v__DOT__refresh_counter,
|
|
m_core->v__DOT__refresh_addr,
|
|
(m_core->v__DOT__need_refresh)?"N":" ");
|
|
*/
|
|
|
printf("\n");
|
printf("\n");
|
}
|
}
|
|
|
// A consistency check ...
|
// A consistency check ...
|
| Line 297... |
Line 289... |
m_core->i_wb_stb = 0;
|
m_core->i_wb_stb = 0;
|
tick();
|
tick();
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
}
|
}
|
|
|
unsigned long wb_read(unsigned a) {
|
void wb_read(unsigned a, unsigned *buf) {
|
int errcount = 0;
|
int errcount = 0;
|
unsigned long result;
|
|
|
|
printf("WB-READ(%08x)\n", a);
|
printf("WB-READ(%08x)\n", a);
|
|
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_we = 0;
|
m_core->i_wb_we = 0;
|
m_core->i_wb_addr= a & SDRAMMASK;
|
m_core->i_wb_sel = 0x0ffff;
|
|
assert((a & 3)==0);
|
|
m_core->i_wb_addr= (a>>2) & SDRAMMASK;
|
|
|
if (m_core->o_wb_stall) {
|
if (m_core->o_wb_stall) {
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
tick();
|
tick();
|
} tick();
|
} tick();
|
| Line 319... |
Line 312... |
|
|
while((errcount++ < BOMBCOUNT)&&(!m_core->o_wb_ack))
|
while((errcount++ < BOMBCOUNT)&&(!m_core->o_wb_ack))
|
tick();
|
tick();
|
|
|
|
|
result = m_core->o_wb_data;
|
for(int j=0; j<4; j++) {
|
if (result != (*this)[a]) {
|
buf[j] = m_core->o_wb_data[j];
|
|
if (buf[j] != (*this)[a+j]) {
|
printf("READ-FAIL\n");
|
printf("READ-FAIL\n");
|
assert(result == (*this)[a]);
|
assert(buf[j] == (*this)[a]);
|
|
}
|
}
|
}
|
|
|
// Release the bus?
|
// Release the bus?
|
m_core->i_wb_cyc = 0;
|
m_core->i_wb_cyc = 0;
|
m_core->i_wb_stb = 0;
|
m_core->i_wb_stb = 0;
|
| Line 341... |
Line 336... |
tick();
|
tick();
|
|
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
|
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
return result;
|
|
}
|
}
|
|
|
void wb_read(unsigned a, int len, unsigned long *buf) {
|
void wb_read(unsigned a, int len, unsigned *buf) {
|
int errcount = 0;
|
int errcount = 0;
|
int THISBOMBCOUNT = BOMBCOUNT * len;
|
int THISBOMBCOUNT = BOMBCOUNT * len;
|
int cnt, rdidx, inc;
|
int cnt, rdidx, inc;
|
|
|
printf("WB-READ(%08x, %d)\n", a, len);
|
printf("WB-READ(%08x, %d)\n", a, len);
|
|
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
wb_tick();
|
wb_tick();
|
|
|
if (errcount >= BOMBCOUNT) {
|
if (errcount >= BOMBCOUNT) {
|
|
printf("WB-READ(%d): Setting bomb to true (errcount = %d)\n", __LINE__, errcount);
|
m_bomb = true;
|
m_bomb = true;
|
return;
|
return;
|
}
|
}
|
|
|
errcount = 0;
|
errcount = 0;
|
|
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_we = 0;
|
m_core->i_wb_we = 0;
|
m_core->i_wb_addr= a & SDRAMMASK;
|
m_core->i_wb_sel = 0x0ffff;
|
|
assert((a&3)==0);
|
|
m_core->i_wb_addr= (a>>2) & SDRAMMASK;
|
|
|
rdidx =0; cnt = 0;
|
rdidx =0; cnt = 0;
|
inc = 1;
|
inc = 1;
|
|
|
do {
|
do {
|
| Line 377... |
Line 374... |
tick();
|
tick();
|
if (!s)
|
if (!s)
|
m_core->i_wb_addr += inc;
|
m_core->i_wb_addr += inc;
|
cnt += (s==0)?1:0;
|
cnt += (s==0)?1:0;
|
if (m_core->o_wb_ack) {
|
if (m_core->o_wb_ack) {
|
buf[rdidx] = m_core->o_wb_data;
|
for(int j=0; j<4; j++) {
|
printf("WB-READ[%08x] = %016lx\n", a+rdidx,
|
buf[rdidx+j] = m_core->o_wb_data[j];
|
m_core->o_wb_data);
|
printf("WB-READ[%08x] = %08x\n",
|
if (buf[rdidx] != (*this)[a+rdidx]) {
|
a+rdidx+j, m_core->o_wb_data[j]);
|
|
if (buf[rdidx+j] != (*this)[a+rdidx+j]){
|
printf("READ-FAIL\n");
|
printf("READ-FAIL\n");
|
assert(buf[rdidx] == (*this)[a+rdidx]);
|
assert(buf[rdidx+j] == (*this)[a+rdidx+j]);
|
|
}
|
}
|
}
|
rdidx++;
|
rdidx+=4;
|
}
|
}
|
} while((cnt < len)&&(errcount++ < THISBOMBCOUNT));
|
} while((cnt < len)&&(errcount++ < THISBOMBCOUNT));
|
|
|
m_core->i_wb_stb = 0;
|
m_core->i_wb_stb = 0;
|
|
|
while((rdidx < len)&&(errcount++ < THISBOMBCOUNT)) {
|
while((rdidx < (len<<2))&&(errcount++ < THISBOMBCOUNT)) {
|
tick();
|
tick();
|
if (m_core->o_wb_ack) {
|
if (m_core->o_wb_ack) {
|
buf[rdidx] = m_core->o_wb_data;
|
for(int j=0; j<4; j++) {
|
printf("WB-READ[%08x] = %016lx\n", a+rdidx,
|
buf[rdidx+j] = m_core->o_wb_data[j];
|
m_core->o_wb_data);
|
printf("WB-READ[%08x] = %08x\n",
|
if (buf[rdidx] != (*this)[a+rdidx]) {
|
a+rdidx+j, m_core->o_wb_data[j]);
|
|
if (buf[rdidx+j] != (*this)[a+rdidx+j]){
|
printf("READ-FAIL\n");
|
printf("READ-FAIL\n");
|
assert(buf[rdidx] == (*this)[a+rdidx]);
|
assert(buf[rdidx+j] == (*this)[a+rdidx+j]);
|
|
}
|
}
|
}
|
rdidx++;
|
rdidx+=4;
|
}
|
}
|
}
|
}
|
|
|
// Release the bus?
|
// Release the bus?
|
m_core->i_wb_cyc = 0;
|
m_core->i_wb_cyc = 0;
|
| Line 419... |
Line 420... |
tick();
|
tick();
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
}
|
}
|
|
|
void wb_write(unsigned a, unsigned long v) {
|
void wb_write(unsigned a, unsigned *v) {
|
int errcount = 0;
|
int errcount = 0;
|
|
|
printf("WB-WRITE(%08x) = %016lx\n", a, v);
|
printf("WB-WRITE(%08x) = %08x:%08x:%08x:%08x\n", a, v[0], v[1], v[2], v[3]);
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_we = 1;
|
m_core->i_wb_we = 1;
|
m_core->i_wb_addr= a & SDRAMMASK;
|
assert((a&3)==0);
|
m_core->i_wb_sel = 0x0ff;
|
m_core->i_wb_addr= (a>>2) & SDRAMMASK;
|
m_core->i_wb_data= v;
|
m_core->i_wb_sel = 0x0ffff;
|
|
m_core->i_wb_data[0]= v[0];
|
|
m_core->i_wb_data[1]= v[1];
|
|
m_core->i_wb_data[2]= v[2];
|
|
m_core->i_wb_data[3]= v[3];
|
|
|
if (m_core->o_wb_stall)
|
if (m_core->o_wb_stall)
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall))
|
tick();
|
tick();
|
tick();
|
tick();
|
| Line 452... |
Line 457... |
} tick();
|
} tick();
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(m_core->v__DOT__bus_fifo_head == m_core->v__DOT__bus_fifo_tail);
|
assert(!m_core->o_wb_ack);
|
assert(!m_core->o_wb_ack);
|
}
|
}
|
|
|
void wb_write(unsigned a, unsigned int ln, unsigned long *buf) {
|
void wb_write(unsigned a, unsigned int ln, unsigned *buf) {
|
unsigned errcount = 0, nacks = 0;
|
unsigned errcount = 0, nacks = 0;
|
|
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_cyc = 1;
|
m_core->i_wb_stb = 1;
|
m_core->i_wb_stb = 1;
|
for(unsigned stbcnt=0; stbcnt<ln; stbcnt++) {
|
assert((a&3)==0);
|
|
for(unsigned stbcnt=0; stbcnt<(ln<<2); stbcnt+=4) {
|
m_core->i_wb_we = 1;
|
m_core->i_wb_we = 1;
|
m_core->i_wb_addr= (a+stbcnt) & SDRAMMASK;
|
m_core->i_wb_addr= ((a+stbcnt)>>2) & SDRAMMASK;
|
m_core->i_wb_sel = 0x0ff;
|
m_core->i_wb_sel = 0x0ffff;
|
m_core->i_wb_data= buf[stbcnt];
|
m_core->i_wb_data[0]= buf[stbcnt+0];
|
|
m_core->i_wb_data[1]= buf[stbcnt+1];
|
|
m_core->i_wb_data[2]= buf[stbcnt+2];
|
|
m_core->i_wb_data[3]= buf[stbcnt+3];
|
errcount = 0;
|
errcount = 0;
|
|
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall)) {
|
while((errcount++ < BOMBCOUNT)&&(m_core->o_wb_stall)) {
|
tick(); if (m_core->o_wb_ack) nacks++;
|
tick(); if (m_core->o_wb_ack) nacks++;
|
}
|
}
|
| Line 499... |
Line 508... |
|
|
bool bombed(void) const { return m_bomb; }
|
bool bombed(void) const { return m_bomb; }
|
|
|
};
|
};
|
|
|
void uload(unsigned len, unsigned long *buf) {
|
void uload(unsigned len, unsigned *buf) {
|
FILE *fp = fopen("/dev/urandom", "r");
|
FILE *fp = fopen("/dev/urandom", "r");
|
|
|
if ((NULL == fp)||(len != fread(buf, sizeof(unsigned long), len, fp))) {
|
if ((NULL == fp)||(len != fread(buf, sizeof(unsigned), len, fp))) {
|
for(int i=0; i<(int)len; i++)
|
for(int i=0; i<(int)len; i++)
|
buf[i] = (((unsigned long)rand())<<32)
|
buf[i] = ((unsigned)rand());
|
|(((unsigned long)rand())&(-1l<<32));
|
|
} if (NULL == fp)
|
} if (NULL == fp)
|
fclose(fp);
|
fclose(fp);
|
}
|
}
|
|
|
int main(int argc, char **argv) {
|
int main(int argc, char **argv) {
|
Verilated::commandArgs(argc, argv);
|
Verilated::commandArgs(argc, argv);
|
DDRSDRAM_TB *tb = new DDRSDRAM_TB;
|
DDRSDRAM_TB *tb = new DDRSDRAM_TB;
|
unsigned long *rdbuf, *mbuf;
|
unsigned *rdbuf, *mbuf;
|
unsigned mlen = (1<<(LGMEMSIZE-3));
|
unsigned mlen = (1<<(LGMEMSIZE-3));
|
|
|
printf("Giving the core 140k cycles to start up\n");
|
printf("Giving the core 140k cycles to start up\n");
|
// Before testing, let's give the unit time enough to warm up
|
// Before testing, let's give the unit time enough to warm up
|
tb->reset();
|
tb->reset();
|
for(int i=0; i<141195; i++)
|
for(int i=0; i<40000+16000+40000+14+6+129+3+13+50; i++)
|
tb->wb_tick();
|
tb->wb_tick();
|
|
|
// Let's short circuit the test, and only test *some* of the memory
|
// Let's short circuit the test, and only test *some* of the memory
|
// space. It'll probably be good enough, and it'll finish while I'm
|
// space. It'll probably be good enough, and it'll finish while I'm
|
// waiting ...
|
// waiting ...
|
mlen = 1<<16;
|
mlen = 1<<16;
|
|
|
printf("Getting some memory ...\n");
|
printf("Getting some memory ...\n");
|
rdbuf = new unsigned long[mlen];
|
rdbuf = new unsigned[mlen];
|
mbuf = new unsigned long[mlen]; // Match buffer
|
mbuf = new unsigned[mlen]; // Match buffer
|
printf("Charging my memory with random values\n");
|
printf("Charging my memory with random values\n");
|
uload(mlen, rdbuf);
|
uload(mlen, rdbuf);
|
|
|
#define CASE_TESTS
|
#define CASE_TESTS
|
#define SINGULAR_WRITE
|
#define SINGULAR_WRITE
|
| Line 545... |
Line 553... |
#define SKIP_WRITE
|
#define SKIP_WRITE
|
#define SKIP_READ
|
#define SKIP_READ
|
|
|
#ifdef CASE_TESTS
|
#ifdef CASE_TESTS
|
{
|
{
|
unsigned long v;
|
printf("CASE-TEST(WRITE,READ)x8\n");
|
for(int i=0; i<8; i++) {
|
unsigned v[4];
|
tb->wb_write(i, rdbuf[i]);
|
bool casefail = false;
|
if ((v=tb->wb_read(i)) != rdbuf[i]) {
|
for(int i=0; i<8*4; i+=4) {
|
printf("CASE-1, %16lx -> MEM[%08x] -> %16lx FAILED (R/W not equal)\n", rdbuf[i], i, v);
|
tb->wb_write(i, &rdbuf[i]);
|
|
tb->wb_read(i, v);
|
|
for(int j=0; j<4; j++) {
|
|
if (v[j] != rdbuf[i+j])
|
|
casefail = true;
|
|
} if (casefail) {
|
|
printf("CASE-1, %08x:%08x:%08x:%08x "
|
|
"-> MEM[%08x] -> "
|
|
"%08x:%08x:%08x:%08x "
|
|
"FAILED (R/W not equal)\n",
|
|
rdbuf[i+0], rdbuf[i+1],
|
|
rdbuf[i+2], rdbuf[i+3], i,
|
|
v[0], v[1], v[2], v[3]);
|
goto test_failure;
|
goto test_failure;
|
} else printf("MATCH[%d] = %16lx\n", i, rdbuf[i]);
|
} else printf("MATCH[%d] = %08x:%08x:%08x:%08x\n",
|
|
i,rdbuf[i], rdbuf[i+1], rdbuf[i+2], rdbuf[i+3]);
|
}
|
}
|
}
|
}
|
|
|
// Now repeat, hitting a different bank with each command
|
// Now repeat, hitting a different bank with each command
|
{
|
{
|
unsigned a;
|
printf("CASE-TEST(WRITE,READ)[RND]x8\n");
|
unsigned long v;
|
unsigned a, v[4];
|
for(int i=0; i<8; i++) {
|
bool casefail = false;
|
a = 1087 + i*1031;
|
for(int i=0; i<8*4; i+=4) {
|
tb->wb_write(a, rdbuf[a]);
|
a = (1087 + i*1031)<<2;
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
if (a >= mlen)
|
printf("CASE-2, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
a &= (mlen-4);
|
|
tb->wb_write(a, &rdbuf[a]);
|
|
tb->wb_read(a, v);
|
|
for(int j=0; j<4; j++) {
|
|
if (v[j] != rdbuf[a+j])
|
|
casefail = true;
|
|
} if (casefail) {
|
|
printf("CASE-2, %08x:%08x:%08x:%08x -> "
|
|
"MEM[%08x] -> %08x:%08x:%08x:%08x "
|
|
"FAILED (R/W not equal)\n",
|
|
rdbuf[a+0], rdbuf[a+1],
|
|
rdbuf[a+2], rdbuf[a+3], a,
|
|
v[0], v[1], v[2], v[3]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
// And again, hitting the same bank with each command
|
// And again, hitting the same bank with each command
|
{
|
{
|
unsigned a;
|
printf("CASE-TEST(WRITE,READ)[rnd]x8\n");
|
unsigned long v;
|
unsigned a, v[4];
|
for(int i=0; i<8; i++) {
|
bool casefail = false;
|
a = 1109 + i*1024;
|
for(int i=0; i<8*4; i+=4) {
|
tb->wb_write(a, rdbuf[a]);
|
a = (1109 + i*256)<<2;
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
tb->wb_write(a, &rdbuf[a]);
|
printf("CASE-3, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
tb->wb_read(a, v);
|
|
for(int j=0; j<4; j++) {
|
|
if (v[j] != rdbuf[a+j])
|
|
casefail = true;
|
|
} if (casefail) {
|
|
printf("CASE-3, %08x:%08x:%08x:%08x -> "
|
|
"MEM[%08x] -> %08x:%08x:%08x:%08x "
|
|
"FAILED (R/W not equal)\n",
|
|
rdbuf[a+0], rdbuf[a+1],
|
|
rdbuf[a+2], rdbuf[a+3], a,
|
|
v[0], v[1], v[2], v[3]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
// Same thing, but writing all first before reading
|
// Same thing, but writing all first before reading
|
{
|
{
|
unsigned a;
|
printf("CASE-TEST(WRITE[Rnd]x8,READ[Rnd]x8)\n");
|
unsigned long v;
|
unsigned a, v[4];
|
for(int i=0; i<8; i++) {
|
bool casefail = false;
|
a = 1109 + i*1024;
|
for(int i=0; i<8*4; i+=4) {
|
tb->wb_write(a, rdbuf[a]);
|
a = (1109 + i*256)<<2;
|
} for(int i=0; i<8; i++) {
|
tb->wb_write(a, &rdbuf[a]);
|
a = 1109 + i*1024;
|
} for(int i=0; i<8*4; i+=4) {
|
if ((v=tb->wb_read(a)) != rdbuf[a]) {
|
a = (1109 + i*256)<<2;
|
printf("CASE-4, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], a, v);
|
tb->wb_read(a, v);
|
|
for(int j=0; j<4; j++) {
|
|
if(v[j] != rdbuf[a+j])
|
|
casefail = true;
|
|
} if (casefail) {
|
|
printf("CASE-4, %08x:%08x:%08x:%08x -> "
|
|
"MEM[%08x] -> %08x:%08x:%08x:%08x "
|
|
"FAILED (R/W not equal)\n",
|
|
rdbuf[a+0], rdbuf[a+1],
|
|
rdbuf[a+2], rdbuf[a+3], a,
|
|
v[0], v[1], v[2], v[3]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
// And a quick pipeline test
|
// And a quick pipeline test
|
{
|
{
|
unsigned long v, mbuf[8];
|
printf("CASE-TEST(WRITEx8P,READx8P)\n");
|
unsigned a = 379;
|
unsigned v, mbuf[8*4], a = (379)<<2;
|
tb->wb_write(0, 8, &rdbuf[379]);
|
tb->wb_write(0, 8, &rdbuf[a]);
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8*4; i++) {
|
a = 379+i;
|
a = (379<<2)+i;
|
if ((v=(*tb)[i]) != rdbuf[a]) {
|
if ((v=(*tb)[i]) != rdbuf[a]) {
|
printf("CASE-5, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], i, v);
|
printf("CASE-5, %08x -> MEM[%08x] -> %08x "
|
|
"FAILED (R/W not equal)\n",
|
|
rdbuf[a], i, v);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
} tb->wb_read(0, 8, mbuf);
|
} tb->wb_read(0, 8, mbuf);
|
for(int i=0; i<8; i++) {
|
for(int i=0; i<8*4; i++) {
|
a = 379+i;
|
a = (379<<2)+i;
|
if (mbuf[i] != rdbuf[a]) {
|
if (mbuf[i] != rdbuf[a]) {
|
printf("CASE-6, %016lx -> MEM[%08x] -> %016lx FAILED (R/W not equal)\n", rdbuf[a], i, mbuf[i]);
|
printf("CASE-6, %08x -> MEM[%08x] -> %08x "
|
|
"FAILED (R/W not equal)\n",
|
|
rdbuf[a], i, mbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
|
|
#ifdef SINGULAR_WRITE
|
#ifdef SINGULAR_WRITE
|
// First test: singular reads through the memory, followed by
|
// First test: singular reads through the memory, followed by
|
// singular writes
|
// singular writes
|
printf("Starting the single-read test\n");
|
{
|
for(int i=0; i<(int)mlen; i++) {
|
printf("SINGULAR(WRITE)::Starting the single-write test\n");
|
tb->wb_write(i, rdbuf[i]);
|
for(int i=0; i<(int)mlen; i+=4) {
|
|
tb->wb_write(i, &rdbuf[i]);
|
tb->wb_tick();
|
tb->wb_tick();
|
if ((*tb)[i] != rdbuf[i]) {
|
for(int j=0; j<4; j++) {
|
printf("WRITE[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
if ((*tb)[i+j] != rdbuf[i+j]) {
|
i, (*tb)[i], rdbuf[i]);
|
printf("WRITE[%06x] = %08x (Expecting %08x) "
|
|
"FAILED\n",
|
|
i, (*tb)[i+j], rdbuf[i+j]);
|
goto test_failure;
|
goto test_failure;
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
|
}
|
|
}
|
}
|
}
|
#else
|
#else
|
#ifdef SINGULAR_READ
|
#ifdef SINGULAR_READ
|
// If we aren't doing the write test, we still need to charge
|
// If we aren't doing the write test, we still need to charge
|
// the memory for the read test. Here we do it manually.
|
// the memory for the read test. Here we do it manually.
|
for(int i=0; i<(int)mlen; i++)
|
for(int i=0; i<(int)mlen; i++)
|
tb->set(i, rdbuf[i]);
|
tb->set(i, rdbuf[i]);
|
#endif // !SINGULAR_WRITE && SINGULAR_READ
|
#endif // !SINGULAR_WRITE && SINGULAR_READ
|
#endif // SINGULAR_WRITE
|
#endif // SINGULAR_WRITE
|
#ifdef SINGULAR_READ
|
#ifdef SINGULAR_READ
|
for(int i=0; i<(int)mlen; i++) {
|
{
|
unsigned long v;
|
printf("SINGULAR(READ)::Starting the single-read test\n");
|
if (rdbuf[i] != (v=tb->wb_read(i))) {
|
for(int i=0; i<(int)mlen; i+=4) {
|
printf("READ[%06x] = %016lx (Expecting %016lx)\n",
|
unsigned v[4];
|
i, v, rdbuf[i]);
|
bool casefail = false;
|
|
|
|
tb->wb_read(i, v);
|
|
for(int j=0; j<4; j++) {
|
|
if (rdbuf[i+j] != v[j])
|
|
casefail = true;
|
|
} if (casefail) {
|
|
printf("READ[%06x] = %08x:%08x:%08x:%08x "
|
|
"(Expecting %08x:%08x:%08x:%08x)\n",
|
|
i, v[0], v[1], v[2], v[3],
|
|
rdbuf[i+0], rdbuf[i+1],
|
|
rdbuf[i+2], rdbuf[i+3]);
|
goto test_failure;
|
goto test_failure;
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
tb->wb_tick();
|
tb->wb_tick();
|
}
|
}
|
|
}
|
#endif
|
#endif
|
|
|
#ifdef BIGPIPELINE_WRITE
|
#ifdef BIGPIPELINE_WRITE
|
|
{
|
// Second test: Vector writes going through all memory, followed a
|
// Second test: Vector writes going through all memory, followed a
|
// massive vector read
|
// massive vector read
|
printf("Starting the big-pipeline write test\n");
|
printf("BIGPIPELINE_WRITE::Starting the big-pipeline write test\n");
|
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
tb->wb_write(0, mlen, rdbuf);
|
tb->wb_write(0, mlen/4, rdbuf);
|
if (tb->bombed())
|
if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
unsigned long v;
|
unsigned v;
|
if (rdbuf[i] != (v=(*tb)[i])) {
|
if (rdbuf[i] != (v=(*tb)[i])) {
|
printf("V-WRITE[%06x] = %016lx (Expecting %016lx)\n",
|
printf("V-WRITE[%06x] = %08x (Expecting %08x)\n",
|
i, v, rdbuf[i]);
|
i, v, rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
|
}
|
#else
|
#else
|
#ifdef BIGPIPELINE_READ
|
#ifdef BIGPIPELINE_READ
|
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
// If we aren't doing the write test, we still need to charge
|
// If we aren't doing the write test, we still need to charge
|
// the memory for the read test. Here we do it manually.
|
// the memory for the read test. Here we do it manually.
|
for(int i=0; i<(int)mlen; i++)
|
for(int i=0; i<(int)mlen; i++)
|
(*tb)[i] = rdbuf[i];
|
(*tb)[i] = rdbuf[i];
|
#endif // BIGPIPELINE_WRITE && BIGPIPELINE_READ
|
#endif // BIGPIPELINE_WRITE && BIGPIPELINE_READ
|
#endif
|
#endif
|
#ifdef BIGPIPELINE_READ
|
#ifdef BIGPIPELINE_READ
|
printf("Starting the big-pipeline read test\n");
|
{
|
tb->wb_read( 0, mlen, mbuf);
|
printf("BIGPIPELINE_READ::Starting the big-pipeline read test\n");
|
|
tb->wb_read( 0, mlen/4, mbuf);
|
if (tb->bombed())
|
if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
if (rdbuf[i] != mbuf[i]) {
|
if (rdbuf[i] != mbuf[i]) {
|
printf("V-READ[%06x] = %016lx (Expecting %016lx)\n",
|
printf("V-READ[%06x] = %08x (Expecting %08x)\n",
|
i, mbuf[i], rdbuf[i]);
|
i, mbuf[i], rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
|
}
|
#endif
|
#endif
|
|
|
#ifdef PRIMEVEC_WRITE
|
#ifdef PRIMEVEC_WRITE
|
printf("Starting the prime-vector write test\n");
|
printf("PRIMEVEC(WRITE)::Starting the prime-vector write test\n");
|
// Third test: Vector writes going through all memory, in prime numbers
|
// Third test: Vector writes going through all memory, in prime numbers
|
// of values at a time, followed by reads via a different prime number
|
// of values at a time, followed by reads via a different prime number
|
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
{
|
{
|
int nw = 3;
|
int nw = 3;
|
for(int i=0; i<(int)mlen; i+=nw) {
|
for(int i=0; i<(int)mlen; i+=nw*4) {
|
int ln = ((int)mlen-i>nw)?nw:mlen-i;
|
int ln = ((int)mlen-i>nw*4)?(nw*4):mlen-i;
|
tb->wb_write(i, nw, &rdbuf[i]);
|
tb->wb_write(i, ln/4, &rdbuf[i]);
|
for(int j=0; j<ln; j++) {
|
for(int j=0; j<ln; j++) {
|
if ((*tb)[i+j] != rdbuf[i+j]) {
|
if ((*tb)[i+j] != rdbuf[i+j]) {
|
printf("P-WRITE[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
printf("P-WRITE[%06x] = %08x (Expecting %08x) FAILED\n",
|
i, (*tb)[i], rdbuf[i]);
|
i, (*tb)[i], rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
| Line 726... |
Line 803... |
for(int i=0; i<(int)mlen; i++)
|
for(int i=0; i<(int)mlen; i++)
|
tb->set(i, rdbuf[i]);
|
tb->set(i, rdbuf[i]);
|
#endif
|
#endif
|
#endif
|
#endif
|
#ifdef PRIMEVEC_READ
|
#ifdef PRIMEVEC_READ
|
printf("Starting the prime-vector read test\n");
|
printf("PRIMEVEC(READ)::Starting the prime-vector read test\n");
|
{
|
{
|
int nr = 13;
|
int nr = 13;
|
for(int i=0; i<(int)mlen; i+=nr) {
|
for(int i=0; i<(int)mlen; i+=nr*4) {
|
int ln = ((int)mlen-i>nr)?nr:mlen-i;
|
int ln = ((int)mlen-i>nr*4)?(nr*4):(mlen-i);
|
tb->wb_read(i, nr, &mbuf[i]);
|
tb->wb_read(i, ln/4, &mbuf[i]);
|
for(int j=0; j<ln; j++) {
|
for(int j=0; j<ln; j++) {
|
if (mbuf[i+j] != rdbuf[i+j]) {
|
if (mbuf[i+j] != rdbuf[i+j]) {
|
printf("P-READ[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
printf("P-READ[%06x] = %08x (Expecting %08x) FAILED\n",
|
i, mbuf[i], rdbuf[i]);
|
i, mbuf[i], rdbuf[i]);
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
} if (tb->bombed())
|
} if (tb->bombed())
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
}
|
}
|
#endif
|
#endif
|
|
|
#ifdef SKIP_WRITE
|
#ifdef SKIP_WRITE
|
|
{
|
// Fourth test: Singular writes though all of memory, skipping by some
|
// Fourth test: Singular writes though all of memory, skipping by some
|
// prime address increment each time, followed by reads via a different
|
// prime address increment each time, followed by reads via a different
|
// prime numbered increment.
|
// prime numbered increment.
|
|
printf("SKIP(WRITE)::Starting the skip write test\n");
|
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
int loc = (i*3889)&(mlen-1);
|
int loc = (i*3889)&(mlen-4);
|
tb->wb_write(loc, rdbuf[loc]);
|
bool casefail = false;
|
if ((*tb)[loc] != rdbuf[loc]) {
|
tb->wb_write(loc, &rdbuf[loc]);
|
printf("R-WRITE[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
for(int j=0; j<4; j++) {
|
i, (*tb)[loc], rdbuf[loc]);
|
if ((*tb)[loc+j] != rdbuf[loc+j]) {
|
goto test_failure;
|
printf("R-WRITE[%06x] = %08x (Expecting %08x) FAILED\n",
|
} if (tb->bombed())
|
i, (*tb)[loc+j], rdbuf[loc+j]);
|
|
casefail = true;
|
|
}
|
|
}
|
|
if ((casefail)||(tb->bombed()))
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
|
}
|
#else
|
#else
|
#ifdef SKIP_READ
|
#ifdef SKIP_READ
|
uload(mlen, rdbuf); // Get some new values
|
uload(mlen, rdbuf); // Get some new values
|
for(int i=0; i<(int)mlen; i++)
|
for(int i=0; i<(int)mlen; i++)
|
tb->set(i, rdbuf[i]);
|
tb->set(i, rdbuf[i]);
|
#endif // !SKIP_WRITE && SKIP_READ
|
#endif // !SKIP_WRITE && SKIP_READ
|
#endif
|
#endif
|
#ifdef SKIP_READ
|
#ifdef SKIP_READ
|
|
printf("SKIP(READ)::Starting the skip read/validate/verify test\n");
|
for(int i=0; i<(int)mlen; i++) {
|
for(int i=0; i<(int)mlen; i++) {
|
int loc = (i*7477)&(mlen-1);
|
int loc = (i*7477)&(mlen-4);
|
mbuf[loc] = tb->wb_read(loc);
|
bool casefail = false;
|
|
tb->wb_read(loc, &mbuf[loc]);
|
|
for(int j=0; j<4; j++) {
|
if (mbuf[loc] != rdbuf[loc]) {
|
if (mbuf[loc] != rdbuf[loc]) {
|
printf("R-READ[%06x] = %016lx (Expecting %016lx) FAILED\n",
|
printf("R-READ[%06x] = %08x (Expecting %08x) FAILED\n",
|
loc, mbuf[loc], rdbuf[loc]);
|
loc, mbuf[loc+j], rdbuf[loc+j]);
|
goto test_failure;
|
casefail = true;
|
} if (tb->bombed())
|
}
|
|
} if ((tb->bombed())||(casefail))
|
goto test_failure;
|
goto test_failure;
|
}
|
}
|
#endif
|
#endif
|
|
|
|
|
