| Line 80... |
Line 80... |
m_core->o_ddr_bus_oe,
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m_core->o_ddr_bus_oe,
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m_core->o_ddr_addr,
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m_core->o_ddr_addr,
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m_core->o_ddr_ba,
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m_core->o_ddr_ba,
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m_core->o_ddr_data);
|
m_core->o_ddr_data);
|
|
|
|
bool writeout = (!m_core->v__DOT__reset_override);
|
|
|
|
if (writeout) {
|
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int cmd;
|
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cmd = (m_core->o_ddr_reset_n?0:32)
|
|
|(m_core->o_ddr_cke?0:16)
|
|
|(m_core->o_ddr_cs_n?8:0)
|
|
|(m_core->o_ddr_ras_n?4:0)
|
|
|(m_core->o_ddr_cas_n?2:0)
|
|
|(m_core->o_ddr_we_n?1:0);
|
printf("%08lx-WB: %s/%s %s%s%s %s@0x%08x[%08x/%08x] -- ",
|
printf("%08lx-WB: %s/%s %s%s%s %s@0x%08x[%08x/%08x] -- ",
|
m_tickcount,
|
m_tickcount,
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(m_core->i_wb_cyc)?"CYC":" ",
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(m_core->i_wb_cyc)?"CYC":" ",
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(m_core->i_wb_stb)?"STB":" ",
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(m_core->i_wb_stb)?"STB":" ",
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(m_core->o_wb_stall)?"STALL":" ",
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(m_core->o_wb_stall)?"STALL":" ",
|
| Line 110... |
Line 120... |
(m_core->o_ddr_ba),
|
(m_core->o_ddr_ba),
|
(m_core->o_ddr_addr),
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(m_core->o_ddr_addr),
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(m_core->i_ddr_data),
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(m_core->i_ddr_data),
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(m_core->o_ddr_data));
|
(m_core->o_ddr_data));
|
|
|
// Reset logic
|
/*
|
printf(" RST(%06x%s[%d] - %08x->%08x)",
|
// Reset logic
|
m_core->v__DOT__reset_timer,
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printf(" RST(%06x%s[%d] - %08x->%08x)",
|
(m_core->v__DOT__reset_ztimer)?"Z":" ",
|
m_core->v__DOT__reset_timer,
|
(m_core->v__DOT__reset_address),
|
(m_core->v__DOT__reset_ztimer)?"Z":" ",
|
(m_core->v__DOT__reset_instruction),
|
(m_core->v__DOT__reset_address),
|
(m_core->v__DOT__reset_cmd));
|
(m_core->v__DOT__reset_instruction),
|
|
(m_core->v__DOT__reset_cmd));
|
|
*/
|
|
|
|
printf(" %s%03x[%d]%04x:%d",
|
|
(m_core->v__DOT__r_pending)?"R":" ",
|
|
(m_core->v__DOT__r_row),
|
|
(m_core->v__DOT__r_bank),
|
|
(m_core->v__DOT__r_col),0);
|
|
// (m_core->v__DOT__r_sub));
|
|
printf(" %s%s%s",
|
|
(m_core->v__DOT__all_banks_closed)?"b":"B",
|
|
(m_core->v__DOT__need_close_bank)?"C":"N",
|
|
//:(m_core->v__DOT__maybe_close_next_bank)?"c":"N",
|
|
(m_core->v__DOT__need_open_bank)?"O":"K");
|
|
// :(m_core->v__DOT__maybe_open_next_bank)?"o":"K");
|
|
for(int i=0; i<8; i++) {
|
|
printf("%s%x@%05x%s",
|
|
(m_core->v__DOT__r_bank==i)?"R":"[",
|
|
m_core->v__DOT__bank_status[i],
|
|
m_core->v__DOT__bank_address[i],
|
|
(m_core->v__DOT__r_nxt_bank==i)?"N":"]");
|
|
}
|
|
|
|
|
extern int gbl_state, gbl_counts;
|
extern int gbl_state, gbl_counts;
|
printf(" %d:%08x ", gbl_state, gbl_counts);
|
printf(" %2d:%08x ", gbl_state, gbl_counts);
|
|
|
|
printf(" %s%s%s%s%s:%08x:%08x",
|
|
(m_core->v__DOT__reset_override)?"R":" ",
|
|
(m_core->v__DOT__need_refresh)?"N":" ",
|
|
(m_core->v__DOT__need_close_bank)?"C":" ",
|
|
(m_core->v__DOT__need_open_bank)?"O":" ",
|
|
(m_core->v__DOT__valid_bank)?"V":" ",
|
|
m_core->v__DOT__activate_bank_cmd,
|
|
m_core->v__DOT__cmd);
|
|
|
|
printf(" F%05x:%d%d%d:%d:%08x",
|
|
m_core->v__DOT__refresh_clk,
|
|
m_core->v__DOT__need_refresh,
|
|
m_core->v__DOT__midrefresh,
|
|
m_core->v__DOT__endrefresh,
|
|
m_core->v__DOT__midrefresh_hctr,
|
|
m_core->v__DOT__midrefresh_lctr);
|
|
|
if (m_core->v__DOT__reset_override)
|
if (m_core->v__DOT__reset_override)
|
printf(" OVERRIDE");
|
printf(" OVERRIDE");
|
|
//if(m_core->v__DOT__last_open_bank)printf(" LST-OPEN");
|
|
switch(cmd) {
|
|
case DDR_MRSET: printf(" MRSET"); break;
|
|
case DDR_REFRESH: printf(" REFRESH"); break;
|
|
case DDR_PRECHARGE: printf(" PRECHARGE%s", (m_core->o_ddr_addr&0x400)?"-ALL":""); break;
|
|
case DDR_ACTIVATE: printf(" ACTIVATE"); break;
|
|
case DDR_WRITE: printf(" WRITE"); break;
|
|
case DDR_READ: printf(" READ"); break;
|
|
case DDR_ZQS: printf(" ZQS"); break;
|
|
case DDR_NOOP: printf(" NOOP"); break;
|
|
default: printf(" Unknown-CMD(%02x)", cmd); break;
|
|
}
|
|
|
|
// Decode the command
|
|
|
printf("\n");
|
printf("\n");
|
|
}
|
|
|
m_core->eval();
|
m_core->eval();
|
m_core->i_clk = 0;
|
m_core->i_clk = 0;
|
m_core->eval();
|
m_core->eval();
|
|
|
