URL
https://opencores.org/ocsvn/wbuart32/wbuart32/trunk
[/] [wbuart32/] [trunk/] [wbuart32.core] - Diff between revs 5 and 15
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Rev 15 |
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description = A full featured UART with Simulator
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description = A full featured UART with Simulator
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simulators = verilator
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simulators = verilator
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[fileset rtl]
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[fileset rtl]
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files =
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files =
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rtl/rxuartlite.v
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rtl/txuartlite.v
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rtl/rxuart.v
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rtl/rxuart.v
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rtl/txuart.v
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rtl/txuart.v
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rtl/ufifo.v
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rtl/ufifo.v
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rtl/wbuart.v
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rtl/wbuart.v
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file_type = verilogSource
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file_type = verilogSource
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