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Line 7... |
//
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//
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// Abstract:
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// Abstract:
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// Geometry Engine top module
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// Geometry Engine top module
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//
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//
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// Author:
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// Author:
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// Kenji Ishimaru (kenji.ishimaru@prtissimo.com)
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// Kenji Ishimaru (info.wf3d@gmail.com)
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//
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//
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//======================================================================
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//======================================================================
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//
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//
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// Copyright (c) 2015, Kenji Ishimaru
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// Copyright (c) 2015, Kenji Ishimaru
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// All rights reserved.
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// All rights reserved.
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// system
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// system
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input clk_core,
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input clk_core,
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input rst_x,
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input rst_x,
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output o_debug,
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output o_debug,
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// Vertex Fetch Memory I/F (Read Only)
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// Vertex Fetch Memory I/F (Read Only)
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output o_req_m,
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(* mark_debug = "true" *) output o_req_m,
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output [31:0] o_adrs_m,
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(* mark_debug = "true" *) output [31:0] o_adrs_m,
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output [2:0] o_len_m,
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(* mark_debug = "true" *) output [2:0] o_len_m,
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input i_ack_m,
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(* mark_debug = "true" *) input i_ack_m,
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input i_strr_m,
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(* mark_debug = "true" *) input i_strr_m,
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input [31:0] i_dbr_m,
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(* mark_debug = "true" *) input [31:0] i_dbr_m,
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// Register Configuration
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// Register Configuration
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// vertex fetch
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// vertex fetch
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input i_dma_start,
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input i_dma_start,
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input [29:0] i_dma_top_address,
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input [29:0] i_dma_top_address,
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input [15:0] i_dma_size,
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input [15:0] i_dma_size,
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Line 140... |
wire [21:0] w_vx_view;
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wire [21:0] w_vx_view;
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wire [21:0] w_vy_view;
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wire [21:0] w_vy_view;
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wire [5:0] w_outcode_view;
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wire [5:0] w_outcode_view;
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`ifdef D3D_USE_CLIP
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`ifdef D3D_USE_CLIP
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wire w_en_clip;
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(* mark_debug = "true" *) wire w_en_clip;
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wire w_ack_clip;
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(* mark_debug = "true" *) wire w_ack_clip;
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wire [21:0] w_vx_clip;
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(* mark_debug = "true" *) wire [21:0] w_vx_clip;
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wire [21:0] w_vy_clip;
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(* mark_debug = "true" *) wire [21:0] w_vy_clip;
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wire [21:0] w_vw_clip;
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(* mark_debug = "true" *) wire [21:0] w_vw_clip;
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wire [5:0] w_outcode_clip;
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(* mark_debug = "true" *) wire [5:0] w_outcode_clip;
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wire w_state_clip;
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(* mark_debug = "true" *) wire w_state_clip;
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`endif
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`endif
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`ifdef D3D_USE_CULL
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`ifdef D3D_USE_CULL
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wire w_en_tri;
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wire w_en_tri;
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wire w_ack_tri;
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wire w_ack_tri;
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