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[/] [xgate/] [trunk/] [README.txt] - Diff between revs 23 and 38

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Rev 23 Rev 38
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////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// SVN tag: None
// SVN tag: None
 
 
 
Nov 09,2009
 
RTL - 85% done - Minor changes to Mastermode bus.
 
 
 
Updates to testbench, Moved RAM.to submodule, Added bus arbitration module
 
   but this is not fully functional. Causes timing problems when master is
 
   polling xgate registers durning debug mode tests. Will probably change RAM
 
   model to dual port in next revision.
 
   Updated master module to include WISHBONE select inputs.
 
 
 
Updates to User Guide.
 
 
 
////////////////////////////////////////////////////////////////////////////////
 
////////////////////////////////////////////////////////////////////////////////
 
// SVN tag: None
 
 
Oct 07,2009
Oct 07,2009
RTL - 85% done
RTL - 85% done
All debug commands now working, including writes to XGCHID register.
All debug commands now working, including writes to XGCHID register.
 
 
Updates to testbench, added timeout and total error count.
Updates to testbench, added timeout and total error count.

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