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// 45678901234567890123456789012345678901234567890123456789012345678901234567890
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// 45678901234567890123456789012345678901234567890123456789012345678901234567890
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// SVN tag: None
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// SVN tag: None
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Dec 02,2009
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RTL - 85% done -- Updated code so there is only one program counter adder.
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Updated WISHBONE Slave bus for word addressability and byte selection.
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Updates to testbench --
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Updates to User Guide -- Minor cleanup.
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// SVN tag: None
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Nov 09,2009
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Nov 09,2009
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RTL - 85% done - Minor changes to Mastermode bus.
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RTL - 85% done - Minor changes to Mastermode bus.
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Updates to testbench, Moved RAM.to submodule, Added bus arbitration module
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Updates to testbench, Moved RAM.to submodule, Added bus arbitration module
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but this is not fully functional. Causes timing problems when master is
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but this is not fully functional. Causes timing problems when master is
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Oct 07,2009
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Oct 07,2009
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RTL - 85% done
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RTL - 85% done
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All debug commands now working, including writes to XGCHID register.
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All debug commands now working, including writes to XGCHID register.
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Updates to testbench, added timeout and total error count.
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Updates to testbench, added timeout and total error count.
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Updates to User Guide.
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Updates to User Guide --.
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Created the sw directory and copied over the software stuff from the bench
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Created the sw directory and copied over the software stuff from the bench
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directory.
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directory.
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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