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[/] [xgate/] [trunk/] [rtl/] [verilog/] [xgate_irq_encode.v] - Diff between revs 2 and 28
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Rev 28 |
| Line 44... |
Line 44... |
output reg [ 6:0] int_req, // Encoded interrupt request
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output reg [ 6:0] int_req, // Encoded interrupt request
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input [MAX_CHANNEL:0] chan_req_i // XGATE Interrupt request
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input [MAX_CHANNEL:0] chan_req_i // XGATE Interrupt request
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);
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);
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// Set int_reg to the index of the index of the highest chen_req_i input that is active
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integer i = 0;
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integer i = 0;
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always @(chan_req_i)
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always @(chan_req_i)
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begin
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begin
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int_req = 0;
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int_req = 0;
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for (i = 0; i <= MAX_CHANNEL; i = i + 1)
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for (i = 0; i <= MAX_CHANNEL; i = i + 1)
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