| Line 66... |
Line 66... |
output reg brk_irq_ena, // Enable BRK instruction to generate interrupt
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output reg brk_irq_ena, // Enable BRK instruction to generate interrupt
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input bus_clk, // Control register bus clock
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input bus_clk, // Control register bus clock
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input async_rst_b, // Async reset signal
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input async_rst_b, // Async reset signal
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input sync_reset, // Syncronous reset signal
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input sync_reset, // Syncronous reset signal
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input cop_flag, // COP Rollover Flag
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input [15:0] write_bus, // Write Data Bus
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input [15:0] write_bus, // Write Data Bus
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input write_xgmctl, // Write Strobe for XGMCTL register
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input write_xgmctl, // Write Strobe for XGMCTL register
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input write_xgisp74, // Write Strobe for XGISP74 register
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input write_xgisp74, // Write Strobe for XGISP74 register
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input write_xgisp30, // Write Strobe for XGISP30 register
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input write_xgisp30, // Write Strobe for XGISP30 register
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input write_xgvbr, // Write Strobe for XGVBR register
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input write_xgvbr, // Write Strobe for XGVBR register
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| Line 80... |
Line 79... |
input write_xgif_4, // Write Strobe for Interrupt Flag Register 4
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input write_xgif_4, // Write Strobe for Interrupt Flag Register 4
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input write_xgif_3, // Write Strobe for Interrupt Flag Register 3
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input write_xgif_3, // Write Strobe for Interrupt Flag Register 3
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input write_xgif_2, // Write Strobe for Interrupt Flag Register 2
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input write_xgif_2, // Write Strobe for Interrupt Flag Register 2
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input write_xgif_1, // Write Strobe for Interrupt Flag Register 1
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input write_xgif_1, // Write Strobe for Interrupt Flag Register 1
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input write_xgif_0, // Write Strobe for Interrupt Flag Register 0
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input write_xgif_0, // Write Strobe for Interrupt Flag Register 0
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input write_xgswt, // Write Strobe for XGSWT register
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input write_xgswt // Write Strobe for XGSWT register
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input access_semaph, // Semaphore strobe
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input [ 2:0] semaph_risc // Semaphore register select from RISC
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);
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);
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// registers
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// registers
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